* config/i386/i386.c (ix86_expand_push): New.
* config/i386/mmx.md (push<MMXMODE>1): New.
* config/i386/sse.md (push<SSEMODE>1): New.
* config/i386/i386-protos.h: Update.
From-SVN: r93970
+2005-01-20 Richard Henderson <rth@redhat.com>
+
+ * config/i386/i386.c (ix86_expand_push): New.
+ * config/i386/mmx.md (push<MMXMODE>1): New.
+ * config/i386/sse.md (push<SSEMODE>1): New.
+ * config/i386/i386-protos.h: Update.
+
2005-01-20 Kazu Hirata <kazu@cs.umass.edu>
* params.def, params.h, predict.c, tree-ssa-loop-im.c: Update
extern void ix86_expand_move (enum machine_mode, rtx[]);
extern void ix86_expand_vector_move (enum machine_mode, rtx[]);
extern void ix86_expand_vector_move_misalign (enum machine_mode, rtx[]);
+extern void ix86_expand_push (enum machine_mode, rtx);
extern rtx ix86_fixup_binary_operands (enum rtx_code,
enum machine_mode, rtx[]);
extern void ix86_fixup_binary_operands_no_copy (enum rtx_code,
gcc_unreachable ();
}
+/* Expand a push in MODE. This is some mode for which we do not support
+ proper push instructions, at least from the registers that we expect
+ the value to live in. */
+
+void
+ix86_expand_push (enum machine_mode mode, rtx x)
+{
+ rtx tmp;
+
+ tmp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
+ GEN_INT (-GET_MODE_SIZE (mode)),
+ stack_pointer_rtx, 1, OPTAB_DIRECT);
+ if (tmp != stack_pointer_rtx)
+ emit_move_insn (stack_pointer_rtx, tmp);
+
+ tmp = gen_rtx_MEM (mode, stack_pointer_rtx);
+ emit_move_insn (tmp, x);
+}
/* Fix up OPERANDS to satisfy ix86_binary_operator_ok. Return the
destination to use for the operation. If different from the true
[(const_int 0)]
"ix86_split_long_move (operands); DONE;")
+(define_expand "push<mode>1"
+ [(match_operand:MMXMODE 0 "register_operand" "")]
+ "TARGET_SSE"
+{
+ ix86_expand_push (<MODE>mode, operands[0]);
+ DONE;
+})
+
(define_expand "movmisalign<mode>"
[(set (match_operand:MMXMODE 0 "nonimmediate_operand" "")
(match_operand:MMXMODE 1 "nonimmediate_operand" ""))]
operands[2] = CONST0_RTX (DFmode);
})
+(define_expand "push<mode>1"
+ [(match_operand:SSEMODE 0 "register_operand" "")]
+ "TARGET_SSE"
+{
+ ix86_expand_push (<MODE>mode, operands[0]);
+ DONE;
+})
+
(define_expand "movmisalign<mode>"
[(set (match_operand:SSEMODE 0 "nonimmediate_operand" "")
(match_operand:SSEMODE 1 "nonimmediate_operand" ""))]
--- /dev/null
+# With -Os we default to -mpreferred-stack-boundary=2, which is not
+# enough for proper operation with V4SImode when the architecture
+# default enables SSE. Arguably setting -mpreferred-stack-boundary=2
+# under this condition is incorrect. Finding the correct set of
+# options such that we don't exchange a FAIL for an XPASS is hard;
+# simply force the stack boundary we need and forget about it for now.
+
+if { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } {
+ set additional_flags "-mpreferred-stack-boundary=4"
+}
+
+return 0