gcc/

	* config/aarch64/aarch64.c (aarch64_force_temporary): Add an extra
	parameter 'mode' of type 'enum machine_mode mode'; change to pass
	'mode' to force_reg.
	(aarch64_add_offset): Update calls to aarch64_force_temporary.
	(aarch64_expand_mov_immediate): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200467 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5398537..4a8023b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,13 @@
 2013-06-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 
+       * config/aarch64/aarch64.c (aarch64_force_temporary): Add an extra
+       parameter 'mode' of type 'enum machine_mode mode'; change to pass
+       'mode' to force_reg.
+       (aarch64_add_offset): Update calls to aarch64_force_temporary.
+       (aarch64_expand_mov_immediate): Likewise.
+
+2013-06-27  Yufeng Zhang  <yufeng.zhang@arm.com>
+
        * config/aarch64/aarch64.c (aarch64_add_offset): Change to pass
        'mode' to aarch64_plus_immediate and gen_rtx_PLUS.
 

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 81c6fd9..77591c1 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -789,10 +789,10 @@ aarch64_split_simd_move (rtx dst, rtx src)
 }
 
 static rtx
-aarch64_force_temporary (rtx x, rtx value)
+aarch64_force_temporary (enum machine_mode mode, rtx x, rtx value)
 {
   if (can_create_pseudo_p ())
-    return force_reg (Pmode, value);
+    return force_reg (mode, value);
   else
     {
       x = aarch64_emit_move (x, value);
@@ -811,8 +811,9 @@ aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT off
          might be improvable in the future.  */
       high = GEN_INT (offset);
       offset = 0;
-      high = aarch64_force_temporary (temp, high);
-      reg = aarch64_force_temporary (temp, gen_rtx_PLUS (mode, high, reg));
+      high = aarch64_force_temporary (mode, temp, high);
+      reg = aarch64_force_temporary (mode, temp,
+                                    gen_rtx_PLUS (mode, high, reg));
     }
   return plus_constant (mode, reg, offset);
 }
@@ -851,7 +852,7 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)
              && targetm.cannot_force_const_mem (mode, imm))
            {
              gcc_assert(can_create_pseudo_p ());
-             base = aarch64_force_temporary (dest, base);
+             base = aarch64_force_temporary (mode, dest, base);
              base = aarch64_add_offset (mode, NULL, base, INTVAL (offset));
              aarch64_emit_move (dest, base);
              return;
@@ -868,7 +869,7 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)
          if (offset != const0_rtx)
            {
              gcc_assert(can_create_pseudo_p ());
-             base = aarch64_force_temporary (dest, base);
+             base = aarch64_force_temporary (mode, dest, base);
              base = aarch64_add_offset (mode, NULL, base, INTVAL (offset));
              aarch64_emit_move (dest, base);
              return;