fdt: add crypto node handling for MPC8{3, 5}xxE processors

Delete the crypto node if not on an E-processor.  If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 3828228..93b144e 100644 (file)
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -442,3 +442,90 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
                       prop, compat, fdt_strerror(err));
 }
 #endif /* CONFIG_HAS_FSL_DR_USB */
+
+#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx)
+/*
+ * update crypto node properties to a specified revision of the SEC
+ * called with sec_rev == 0 if not on an mpc8xxxE processor
+ */
+void fdt_fixup_crypto_node(void *blob, int sec_rev)
+{
+       const struct sec_rev_prop {
+               u32 sec_rev;
+               u32 num_channels;
+               u32 channel_fifo_len;
+               u32 exec_units_mask;
+               u32 descriptor_types_mask;
+       } sec_rev_prop_list [] = {
+               { 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
+               { 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
+               { 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
+               { 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
+               { 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
+               { 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */
+       };
+       char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
+                           sizeof("fsl,secX.Y")];
+       int crypto_node, sec_idx, err;
+       char *p;
+       u32 val;
+
+       /* locate crypto node based on lowest common compatible */
+       crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
+       if (crypto_node == -FDT_ERR_NOTFOUND)
+               return;
+
+       /* delete it if not on an E-processor */
+       if (crypto_node > 0 && !sec_rev) {
+               fdt_del_node(blob, crypto_node);
+               return;
+       }
+
+       /* else we got called for possible uprev */
+       for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
+               if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
+                       break;
+
+       if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
+               puts("warning: unknown SEC revision number\n");
+               return;
+       }
+
+       val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
+       err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
+       if (err < 0)
+               printf("WARNING: could not set crypto property: %s\n",
+                      fdt_strerror(err));
+
+       val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
+       err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
+       if (err < 0)
+               printf("WARNING: could not set crypto property: %s\n",
+                      fdt_strerror(err));
+
+       val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
+       err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
+       if (err < 0)
+               printf("WARNING: could not set crypto property: %s\n",
+                      fdt_strerror(err));
+
+       val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
+       err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
+       if (err < 0)
+               printf("WARNING: could not set crypto property: %s\n",
+                      fdt_strerror(err));
+
+       val = 0;
+       while (sec_idx >= 0) {
+               p = compat_strlist + val;
+               val += sprintf(p, "fsl,sec%d.%d",
+                       (sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
+                       sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
+               sec_idx--;
+       }
+       err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
+       if (err < 0)
+               printf("WARNING: could not set crypto property: %s\n",
+                      fdt_strerror(err));
+}
+#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */

diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c
index 02c4d05..267ae6a 100644 (file)
--- a/cpu/mpc83xx/fdt.c
+++ b/cpu/mpc83xx/fdt.c
@@ -26,6 +26,7 @@
 #include <common.h>
 #include <libfdt.h>
 #include <fdt_support.h>
+#include <asm/processor.h>
 
 extern void ft_qe_setup(void *blob);
 
@@ -33,6 +34,23 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
+       immap_t *immr = (immap_t *)CFG_IMMR;
+       int spridr = immr->sysconf.spridr;
+
+       /*
+        * delete crypto node if not on an E-processor
+        * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
+        * EA revisions got the SEC uprevved to 2.4 but since the default device
+        * tree contains SEC 2.0 properties we uprev them here.
+        */
+       if (!IS_E_PROCESSOR(spridr))
+               fdt_fixup_crypto_node(blob, 0);
+       else if (IS_E_PROCESSOR(spridr) &&
+                (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
+                 SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
+                REVID_MAJOR(spridr) >= 2)
+               fdt_fixup_crypto_node(blob, 0x0204);
+
 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
        fdt_fixup_ethernet(blob, bd);

diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index 92952e6..c8d2c6a 100644 (file)
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -29,6 +29,7 @@
 #include <asm/processor.h>
 
 extern void ft_qe_setup(void *blob);
+
 #ifdef CONFIG_MP
 #include "mp.h"
 DECLARE_GLOBAL_DATA_PTR;
@@ -205,6 +206,10 @@ static inline void ft_fixup_cache(void *blob)
 
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
+       /* delete crypto node if not on an E-processor */
+       if (!IS_E_PROCESSOR(get_svr()))
+               fdt_fixup_crypto_node(blob, 0);
+
 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
        fdt_fixup_ethernet(blob, bd);

diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 10fd478..6734857 100644 (file)
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -885,6 +885,15 @@
 /* Some parts define SVR[0:23] as the SOC version */
 #define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF)     /* SOC Version fields */
 
+/* whether MPC8xxxE (i.e. has SEC) */
+#if defined(CONFIG_MPC85xx)
+#define IS_E_PROCESSOR(svr)    (svr & 0x80000)
+#else
+#if defined(CONFIG_MPC83XX)
+#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000))
+#endif
+#endif
+
 /*
  * SVR_SOC_VER() Version Values
  */

diff --git a/include/fdt_support.h b/include/fdt_support.h
index 890993f..a7c6326 100644 (file)
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -56,6 +56,12 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd);
 static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
 #endif /* CONFIG_HAS_FSL_DR_USB */
 
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX)
+void fdt_fixup_crypto_node(void *blob, int sec_rev);
+#else
+static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
+#endif
+
 #ifdef CONFIG_OF_BOARD_SETUP
 void ft_board_setup(void *blob, bd_t *bd);
 void ft_cpu_setup(void *blob, bd_t *bd);

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 939b825..897ecd6 100644 (file)
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -61,21 +61,26 @@
 #endif
 
 #define PARTID_NO_E(spridr)            ((spridr & 0xFFFE0000) >> 16)
-#define IS_E_PROCESSOR(spridr)         (!(spridr & 0x00010000)) /* has SEC */
+#define SPR_FAMILY(spridr)             ((spridr & 0xFFF00000) >> 20)
 
+#define SPR_831X_FAMILY                        0x80B
 #define SPR_8311                       0x80B2
 #define SPR_8313                       0x80B0
 #define SPR_8314                       0x80B6
 #define SPR_8315                       0x80B4
+#define SPR_832X_FAMILY                        0x806
 #define SPR_8321                       0x8066
 #define SPR_8323                       0x8062
+#define SPR_834X_FAMILY                        0x803
 #define SPR_8343                       0x8036
 #define SPR_8347_TBGA_                 0x8032
 #define SPR_8347_PBGA_                 0x8034
 #define SPR_8349                       0x8030
+#define SPR_836X_FAMILY                        0x804
 #define SPR_8358_TBGA_                 0x804A
 #define SPR_8358_PBGA_                 0x804E
 #define SPR_8360                       0x8048
+#define SPR_837X_FAMILY                        0x80C
 #define SPR_8377                       0x80C6
 #define SPR_8378                       0x80C4
 #define SPR_8379                       0x80C2