drm/i915/gen9: Reject display updates that exceed wm limitations (v2)

If we can't find any valid level 0 watermark values for the requested
atomic transaction, reject the configuration before we try to start
programming the hardware.

v2:
 - Add extra debugging output when we reject level 0 watermarks so that
   we can more easily debug how/why they were rejected.

Cc: Lyude Paul <cpaul@redhat.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-17-git-send-email-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f9dff5e..fcf925b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3306,7 +3306,22 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
 
        if (res_blocks >= ddb_allocation || res_lines > 31) {
                *enabled = false;
-               return 0;
+
+               /*
+                * If there are no valid level 0 watermarks, then we can't
+                * support this display configuration.
+                */
+               if (level) {
+                       return 0;
+               } else {
+                       DRM_DEBUG_KMS("Requested display configuration exceeds system watermark limitations\n");
+                       DRM_DEBUG_KMS("Plane %d.%d: blocks required = %u/%u, lines required = %u/31\n",
+                                     to_intel_crtc(cstate->base.crtc)->pipe,
+                                     skl_wm_plane_id(to_intel_plane(pstate->plane)),
+                                     res_blocks, ddb_allocation, res_lines);
+
+                       return -EINVAL;
+               }
        }
 
        *out_blocks = res_blocks;