HACK/i965: Default to scalar GS on BDW+

diff --git a/src/mesa/drivers/dri/i965/brw_compiler.c b/src/mesa/drivers/dri/i965/brw_compiler.c
index f9e22d1..682e61b 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_compiler.c
+++ b/src/mesa/drivers/dri/i965/brw_compiler.c
@@ -133,7 +133,7 @@ brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo)
    compiler->scalar_stage[MESA_SHADER_TESS_EVAL] =
       devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_TES", true);
    compiler->scalar_stage[MESA_SHADER_GEOMETRY] =
-      devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_GS", false);
+      devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_GS", true);
    compiler->scalar_stage[MESA_SHADER_FRAGMENT] = true;
    compiler->scalar_stage[MESA_SHADER_COMPUTE] = true;
 

diff --git a/src/vulkan/anv_device.c b/src/vulkan/anv_device.c
index ed9bb08..f9aa314 100644 (file)
--- a/src/vulkan/anv_device.c
+++ b/src/vulkan/anv_device.c
@@ -138,10 +138,6 @@ anv_physical_device_init(struct anv_physical_device *device,
    device->compiler->shader_debug_log = compiler_debug_log;
    device->compiler->shader_perf_log = compiler_perf_log;
 
-   /* Default to use scalar GS on BDW+ */
-   device->compiler->scalar_stage[MESA_SHADER_GEOMETRY] =
-      device->info->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_GS", true);
-
    /* XXX: Actually detect bit6 swizzling */
    isl_device_init(&device->isl_dev, device->info, swizzled);