re PR target/59405 (Incorrect FP<->MMX transition during call/ret)
authorUros Bizjak <uros@gcc.gnu.org>
Fri, 6 Dec 2013 17:16:52 +0000 (18:16 +0100)
committerUros Bizjak <uros@gcc.gnu.org>
Fri, 6 Dec 2013 17:16:52 +0000 (18:16 +0100)
PR target/59405
* config/i386/i386.c (type_natural_mode): Properly handle
size 8 for !TARGET_64BIT.

testsuite/ChangeLog:

PR target/59405
* gcc.target/i386/pr59405.c: New test.

From-SVN: r205753

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr59405.c [new file with mode: 0644]

index 1dab68e..0027a4c 100644 (file)
@@ -1,6 +1,13 @@
+2013-12-06  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/59405
+       * config/i386/i386.c (type_natural_mode): Properly handle
+       size 8 for !TARGET_64BIT.
+
 2013-12-06  Trevor Saunders  <tsaunders@mozilla.com>
 
-       * tree-ssa-pre.c (compute_antic_aux): Remove redundant call to vec::release.
+       * tree-ssa-pre.c (compute_antic_aux): Remove redundant call to
+       vec::release.
 
 2013-12-06  Ian Bolton  <ian.bolton@arm.com>
            Mark Mitchell  <mark@codesourcery.com>
@@ -11,8 +18,7 @@
 
 2013-12-06  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 
-       * expr.c (expand_assignment): Update bitregion_start and
-       bitregion_end.
+       * expr.c (expand_assignment): Update bitregion_start and bitregion_end.
 
 2013-12-06  Eric Botcazou  <ebotcazou@adacore.com>
 
@@ -86,8 +92,7 @@
 2013-12-06  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/59058
-       * tree-vectorizer.h (struct _loop_vec_info): Add num_itersm1
-       member.
+       * tree-vectorizer.h (struct _loop_vec_info): Add num_itersm1 member.
        (LOOP_VINFO_NITERSM1): New macro.
        * tree-vect-loop-manip.c (slpeel_tree_peel_loop_to_edge): Express
        the vector loop entry test in terms of scalar latch executions.
        * config/i386/i386.c (cpu_names): Add "ia".
        (processor_alias_table): Likewise.
        (ix86_option_override_internal): Disallow -march=ia.
-       * config/i386/i386.h (target_cpu_default): Add
-       TARGET_CPU_DEFAULT_ia.
+       * config/i386/i386.h (target_cpu_default): Add TARGET_CPU_DEFAULT_ia.
 
        * doc/invoke.texi: Document -mtune=ia.
 
        (ubsan_build_overflow_builtin): Adjust ubsan_encode_value call.
        * ubsan.h (ubsan_encode_value): Adjust declaration.
        * internal-fn.c (ubsan_expand_si_overflow_addsub_check): Move
-       ubsan_build_overflow_builtin above expand_normal call.  Surround this call
-       with push_temp_slots and pop_temp_slots.
+       ubsan_build_overflow_builtin above expand_normal call.  Surround
+       this call with push_temp_slots and pop_temp_slots.
        (ubsan_expand_si_overflow_neg_check): Likewise.
        (ubsan_expand_si_overflow_mul_check): Likewise.
 
 
 2013-12-05  Tejas Belagod  <tejas.belagod@arm.com>
 
-       * rtlanal.c (set_noop_p): Return nonzero in case of redundant vec_select
-       for overlapping register lanes.
+       * rtlanal.c (set_noop_p): Return nonzero in case of redundant
+       vec_select for overlapping register lanes.
 
 2013-12-05  Kirill Yukhin  <kirill.yukhin@intel.com>
 
 
 2013-12-05  Kirill Yukhin  <kirill.yukhin@intel.com>
 
-        * config/i386/i386.c (IX86_BUILTIN_READ_FLAGS): New.
+       * config/i386/i386.c (IX86_BUILTIN_READ_FLAGS): New.
        (IX86_BUILTIN_WRITE_FLAGS): Ditto.
        (ix86_init_mmx_sse_builtins): Define
        __builtin_ia32_writeeflags_u32, __builtin_ia32_writeeflags_u64,
        PR tree-optimization/59374
        * tree-vect-data-refs.c (vect_slp_analyze_data_ref_dependence):
        Commonize known and unknown dependence case fixing the allowed
-       read-write dependence case and dropping code that should not
-       matter.
+       read-write dependence case and dropping code that should not matter.
 
 2013-12-05  Kirill Yukhin  <kirill.yukhin@intel.com>
 
        -fsanitize=signed-integer-overflow.
        * config/i386/i386.md (addv<mode>4, subv<mode>4, mulv<mode>4,
        negv<mode>3, negv<mode>3_1): Define expands.
-       (*addv<mode>4, *subv<mode>4, *mulv<mode>4, *negv<mode>3): Define
-       insns.
+       (*addv<mode>4, *subv<mode>4, *mulv<mode>4, *negv<mode>3): Define insns.
        * sanitizer.def (BUILT_IN_UBSAN_HANDLE_ADD_OVERFLOW,
        BUILT_IN_UBSAN_HANDLE_SUB_OVERFLOW,
        BUILT_IN_UBSAN_HANDLE_MUL_OVERFLOW,
        -fisolate-erroneous-paths-dereference and
        -fisolate-erroneous-paths-attribute.
        * invoke.texi: Corresponding changes.
-       * gimple.c (infer_nonnull_range):  Add and use new arguments
-       to control what kind of statements can be used to infer a
-       non-null range.
+       * gimple.c (infer_nonnull_range):  Add and use new arguments to control
+       what kind of statements can be used to infer a non-null range.
        * gimple.h (infer_nonnull_range): Update prototype.
        * tree-vrp.c (infer_value_range): Corresponding changes.
        * opts.c (default_options_table): Update due to option split.
        (find_implicit_erroneous_behaviour): Pass additional arguments
        to infer_nonnull_range.
        (find_explicit_erroneous_behaviour): Similarly.
-       (gate_isolate_erroneous_paths): Check both of the new
-       options.
+       (gate_isolate_erroneous_paths): Check both of the new options.
 
 2013-12-04  Jeff Law  <law@redhat.com>
 
        * config/arm/arm.c (arm_preferred_reload_class): Only return LO_REGS
        when rclass is GENERAL_REGS.
 
-2013-12-02 Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
+2013-12-02  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
 
        * loop-unroll.c (decide_unroll_constant_iterations): Check macro
        TARGET_LOOP_UNROLL_ADJUST while deciding unroll factor.
        * tree-vect-loop.c (vect_estimate_min_profitable_iters): Ditto
        plus added openmp-simd warining.
 
-2013-11-27   H.J. Lu  <hongjiu.lu@intel.com>
+2013-11-27  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR rtl-optimization/59311
        * dwarf2cfi.c (dwf_regno): Assert reg isn't pseudo register.
        * config/arm/arm.c (arm_new_rtx_costs): Initialise cost correctly
        for zero_extend case.
 
-2013-11-26   H.J. Lu  <hongjiu.lu@intel.com>
+2013-11-26  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR bootstrap/55552
        * configure.ac (install_gold_as_default): New.  Set to yes for
 
        * doc/invoke.texi: Mention AES, PCLMUL and RDRND for Silvermont.
 
-2013-11-22 Andrew MacLeod  <amacleod@redhat.com>
+2013-11-22  Andrew MacLeod  <amacleod@redhat.com>
 
        * hooks.h (hook_uint_mode_0): Add Prototype.
        * hooks.c (hook_uint_mode_0): New default function.
        * doc/tm.texi.in (TARGET_ATOMIC_ALIGN_FOR_MODE): Define.
        * doc/tm.texi (TARGET_ATOMIC_ALIGN_FOR_MODE): Add description.
 
-2013-11-22 Andrew MacLeod  <amacleod@redhat.com>
+2013-11-22  Andrew MacLeod  <amacleod@redhat.com>
 
        * gimple.h: Remove all includes.
        (recalculate_side_effects): Move prototype to gimplify.h.
        * profile.c (compute_branch_probabilities): Do not sanity check
        run_max.
 
-2013-11-18 Kenneth Zadeck <zadeck@naturalbridge.com>
+2013-11-18  Kenneth Zadeck  <zadeck@naturalbridge.com>
 
        * tree.c (int_fits_type_p): Change GET_MODE_BITSIZE to
        GET_MODE_PRECISION.
        * lto-streamer-in.c (input function): Call cgraph_create_node if
        cgraph_get_node failed.
 
-2013-11-14   Olivier Hainque  <hainque@adacore.com>
+2013-11-14  Olivier Hainque  <hainque@adacore.com>
 
        * cfgexpand.c (defer_stack_allocation): When optimization is enabled,
        defer allocation of DECL_IGNORED_P variables at toplevel unless really
        * config/iq2000/iq2000.c (init_cumulative_args): Likewise.
        * config/rs6000/rs6000.c (init_cumulative_args): Likewise.
 
-2013-10-16 Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
+2013-10-16  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
 
        * config/i386/i386.c (ix86_option_override_internal): Enable FMA4
        for AMD bdver3.
        * config/cris/t-elfmulti (MULTILIB_OPTIONS, MULTILIB_DIRNAMES)
        (MULTILIB_MATCHES): Add multilib for -march=v8.
 
-2013-10-15 Sriraman Tallam  <tmsriram@google.com>
+2013-10-15  Sriraman Tallam  <tmsriram@google.com>
 
        PR target/57756
        * optc-save-gen.awk: Add extra parameter to the save and restore
index 382f8fb..c742659 100644 (file)
@@ -6172,7 +6172,8 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum)
                      }
                    return TYPE_MODE (type);
                  }
-               else if ((size == 8 || size == 16) && !TARGET_SSE)
+               else if (((size == 8 && TARGET_64BIT) || size == 16)
+                        && !TARGET_SSE)
                  {
                    static bool warnedsse;
 
@@ -6184,10 +6185,21 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum)
                        warning (0, "SSE vector argument without SSE "
                                 "enabled changes the ABI");
                      }
-                   return mode;
                  }
-               else
-                 return mode;
+               else if ((size == 8 && !TARGET_64BIT) && !TARGET_MMX)
+                 {
+                   static bool warnedmmx;
+
+                   if (cum
+                       && !warnedmmx
+                       && cum->warn_mmx)
+                     {
+                       warnedmmx = true;
+                       warning (0, "MMX vector argument without MMX "
+                                "enabled changes the ABI");
+                     }
+                 }
+               return mode;
              }
 
          gcc_unreachable ();
index bdc3720..7d37ee1 100644 (file)
@@ -1,5 +1,10 @@
+2013-12-06  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/59405
+       * gcc.target/i386/pr59405.c: New test.
+
 2013-12-06  Ian Bolton  <ian.bolton@arm.com>
-            Mark Mitchell  <mark@codesourcery.com>
+           Mark Mitchell  <mark@codesourcery.com>
 
        PR target/59091
        * gcc.target/arm/builtin-trap.c: New test.
@@ -56,7 +61,7 @@
 
 2013-12-05  Kirill Yukhin  <kirill.yukhin@intel.com>
 
-        * gcc.target/i386/readeflags-1.c: New.
+       * gcc.target/i386/readeflags-1.c: New.
        * gcc.target/i386/writeeflags-1.c: Ditto.
 
 2013-12-05  Yury Gribov  <y.gribov@samsung.com>
@@ -91,8 +96,7 @@
 2013-12-05  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/56787
-       * gcc.dg/vect/pr56787.c: Adjust to not require vector float
-       division.
+       * gcc.dg/vect/pr56787.c: Adjust to not require vector float division.
 
 2013-12-05  Kostya Serebryany  <kcc@google.com>
 
 
 2013-12-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
-       * gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c: Skip for little
-       endian.
+       * gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c: Skip for little endian.
 
-2013-12-03   H.J. Lu  <hongjiu.lu@intel.com>
+2013-12-03  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/59363
        * gcc.target/i386/pr59363.c: New file.
 2013-12-02  Sriraman Tallam  <tmsriram@google.com>
 
        PR target/58944
-       * testsuite/gcc.target/i386/pr58944.c: New test.        
+       * testsuite/gcc.target/i386/pr58944.c: New test.
 
 2013-12-02  Joseph Myers  <joseph@codesourcery.com>
 
 
        * gcc.dg/tree-prof/tree-prof.exp: Fix comment.
 
-2013-10-15 Sriraman Tallam  <tmsriram@google.com>
+2013-10-15  Sriraman Tallam  <tmsriram@google.com>
 
        PR target/57756
        * gcc.target/i386/pr57756.c: New test.
diff --git a/gcc/testsuite/gcc.target/i386/pr59405.c b/gcc/testsuite/gcc.target/i386/pr59405.c
new file mode 100644 (file)
index 0000000..1136e2e
--- /dev/null
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+/* { dg-options "-mmmx -mfpmath=387" } */
+
+#include "mmx-check.h"
+
+#include <mmintrin.h>
+
+typedef float float32x2_t __attribute__ ((vector_size (8)));
+
+float
+foo32x2_be (float32x2_t x)
+{
+  _mm_empty ();
+  return x[1];
+}
+
+static void
+mmx_test (void)
+{
+  float32x2_t b = { 0.0f, 1.0f };
+
+  if (foo32x2_be (b) != 1.0f)
+    abort ();
+}