r8169: improve RTL8168b FIFO overflow workaround

So far only the reset bit it set, but the handler executing the reset
is not scheduled. Therefore nothing will happen until some other action
schedules the handler. Improve this by ensuring that the handler is
scheduled.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index e9ced0360f5897ee0bc773184576cc2c34f5a081..b7dc1c112a94b6ce50fe440a328feac49517d7a8 100644 (file)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -4575,8 +4575,7 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
        if (unlikely(status & RxFIFOOver &&
            tp->mac_version == RTL_GIGA_MAC_VER_11)) {
                netif_stop_queue(tp->dev);
-               /* XXX - Hack alert. See rtl_task(). */
-               set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags);
+               rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
        }
 
        rtl_irq_disable(tp);