class MCAsmInfo;
class MCInst;
-class MCOperand;
-class MCInstrInfo;
class MCInstrAnalysis;
+class MCInstrInfo;
+class MCOperand;
+class MCRegister;
class MCRegisterInfo;
class MCSubtargetInfo;
-class raw_ostream;
class StringRef;
+class raw_ostream;
/// Convert `Bytes' to a hex string and output to `OS'
void dumpBytes(ArrayRef<uint8_t> Bytes, raw_ostream &OS);
StringRef getOpcodeName(unsigned Opcode) const;
/// Print the assembler register name.
- virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
+ virtual void printRegName(raw_ostream &OS, MCRegister Reg) const;
bool getUseMarkup() const { return UseMarkup; }
void setUseMarkup(bool Value) { UseMarkup = Value; }
return getParser().parsePrimaryExpr(Res, EndLoc, nullptr);
}
- virtual bool parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
+ virtual bool parseRegister(MCRegister &Reg, SMLoc &StartLoc,
SMLoc &EndLoc) = 0;
/// tryParseRegister - parse one register if possible
/// location, without failing the entire parse if it can't. Must not consume
/// tokens if the parse fails.
virtual OperandMatchResultTy
- tryParseRegister(MCRegister &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) = 0;
+ tryParseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) = 0;
/// ParseInstruction - Parse one assembly instruction.
///
return MII.getName(Opcode);
}
-void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void MCInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
llvm_unreachable("Target should implement this");
}
return false;
}
-void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << getRegisterName(RegNo) << markup(">");
+void AArch64InstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << getRegisterName(Reg) << markup(">");
}
-void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo,
+void AArch64InstPrinter::printRegName(raw_ostream &OS, MCRegister Reg,
unsigned AltIdx) const {
- OS << markup("<reg:") << getRegisterName(RegNo, AltIdx) << markup(">");
+ OS << markup("<reg:") << getRegisterName(Reg, AltIdx) << markup(">");
+}
+
+StringRef AArch64InstPrinter::getRegName(MCRegister Reg) const {
+ return getRegisterName(Reg);
}
void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
AArch64InstPrinter::printInst(MI, Address, Annot, STI, O);
}
+StringRef AArch64AppleInstPrinter::getRegName(MCRegister Reg) const {
+ return getRegisterName(Reg);
+}
+
bool AArch64InstPrinter::printRangePrefetchAlias(const MCInst *MI,
const MCSubtargetInfo &STI,
raw_ostream &O,
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
- void printRegName(raw_ostream &OS, unsigned RegNo, unsigned AltIdx) const;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg, unsigned AltIdx) const;
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
const MCSubtargetInfo &STI,
raw_ostream &O);
- virtual StringRef getRegName(unsigned RegNo) const {
- return getRegisterName(RegNo);
- }
+ virtual StringRef getRegName(MCRegister Reg) const;
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = AArch64::NoRegAltName);
protected:
const MCSubtargetInfo &STI,
raw_ostream &O) override;
- StringRef getRegName(unsigned RegNo) const override {
- return getRegisterName(RegNo);
- }
+ StringRef getRegName(MCRegister Reg) const override;
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = AArch64::NoRegAltName);
};
cl::init(false),
cl::ReallyHidden);
-void AMDGPUInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void AMDGPUInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
// FIXME: The current implementation of
// AsmParser::parseRegisterOrRegisterNumber in MC implies we either emit this
// as an integer or we provide a name which represents a physical register.
// would extend MC to support parsing DWARF register names so we could do
// something like `.cfi_undefined dwarf_wave32_v0`. For now we just live with
// non-pretty DWARF register names in assembly text.
- OS << RegNo;
+ OS << Reg.id();
}
void AMDGPUInstPrinter::printInst(const MCInst *MI, uint64_t Address,
const MCInstrInfo &MII, const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
- //Autogenerated by tblgen
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ // Autogenerated by tblgen
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
static void printRegOperand(unsigned RegNo, raw_ostream &O,
const MCSubtargetInfo &STI, raw_ostream &O) override;
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printAbs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printBankSwizzle(const MCInst *MI, unsigned OpNo, raw_ostream &O);
return BadConditionCode(CC);
}
-void ARCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << StringRef(getRegisterName(RegNo)).lower();
+void ARCInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << StringRef(getRegisterName(Reg)).lower();
}
void ARCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
void printCCOperand(const MCInst *MI, int OpNum, raw_ostream &O);
} // end anonymous namespace.
void ARMOperand::print(raw_ostream &OS) const {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return ARMInstPrinter::getRegisterName(Reg);
else
return false;
}
-void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << getRegisterName(RegNo, DefaultAltIdx) << markup(">");
+void ARMInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << getRegisterName(Reg, DefaultAltIdx) << markup(">");
}
void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address,
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = ARM::NoRegAltName);
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
const MCSubtargetInfo &STI, raw_ostream &O) override;
private:
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = AVR::NoRegAltName);
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
};
}
}
void print(raw_ostream &OS) const override {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return CSKYInstPrinter::getRegisterName(Reg);
else
printAnnotation(O, Annot);
}
-void CSKYInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
+void CSKYInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
if (PrintBranchImmAsAddress)
- O << getRegisterName(RegNo, ABIRegNames ? CSKY::ABIRegAltName
- : CSKY::NoRegAltName);
+ O << getRegisterName(Reg, ABIRegNames ? CSKY::ABIRegAltName
+ : CSKY::NoRegAltName);
else
- O << getRegisterName(RegNo);
+ O << getRegisterName(Reg);
}
void CSKYInstPrinter::printFPRRegName(raw_ostream &O, unsigned RegNo) const {
}
}
-const char *CSKYInstPrinter::getRegisterName(unsigned RegNo) {
- return getRegisterName(RegNo, ArchRegNames ? CSKY::NoRegAltName
- : CSKY::ABIRegAltName);
+const char *CSKYInstPrinter::getRegisterName(MCRegister Reg) {
+ return getRegisterName(Reg, ArchRegNames ? CSKY::NoRegAltName
+ : CSKY::ABIRegAltName);
}
void CSKYInstPrinter::printFPR(const MCInst *MI, unsigned OpNo,
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O, const char *Modifier = nullptr);
raw_ostream &O);
void printFPR(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
+ static const char *getRegisterName(MCRegister Reg);
+ static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);
};
} // namespace llvm
#define GET_INSTRUCTION_NAME
#include "HexagonGenAsmWriter.inc"
-void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << getRegisterName(RegNo);
+void HexagonInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << getRegisterName(Reg);
}
void HexagonInstPrinter::printInst(const MCInst *MI, uint64_t Address,
void printInst(MCInst const *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
- static char const *getRegisterName(unsigned RegNo);
+ static char const *getRegisterName(MCRegister Reg);
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
#define PRINT_ALIAS_INSTR
#include "LanaiGenAsmWriter.inc"
-void LanaiInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << StringRef(getRegisterName(RegNo)).lower();
+void LanaiInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << StringRef(getRegisterName(Reg)).lower();
}
bool LanaiInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ static const char *getRegisterName(MCRegister Reg);
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
private:
bool printAlias(const MCInst *MI, raw_ostream &Ostream);
}
void print(raw_ostream &OS) const override {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return LoongArchInstPrinter::getRegisterName(Reg);
else
printAnnotation(O, Annot);
}
-void LoongArchInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << '$' << getRegisterName(RegNo);
+void LoongArchInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << '$' << getRegisterName(Reg);
}
void LoongArchInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
printRegName(O, MO.getReg());
}
-const char *LoongArchInstPrinter::getRegisterName(unsigned RegNo) {
+const char *LoongArchInstPrinter::getRegisterName(MCRegister Reg) {
// Default print reg alias name
- return getRegisterName(RegNo, LoongArch::RegAliasName);
+ return getRegisterName(Reg, LoongArch::RegAliasName);
}
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printAtomicMemOp(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O);
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
+ static const char *getRegisterName(MCRegister Reg);
+ static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);
private:
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
#define PRINT_ALIAS_INSTR
#include "M68kGenAsmWriter.inc"
-void M68kInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << "%" << getRegisterName(RegNo);
+void M68kInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << "%" << getRegisterName(Reg);
}
void M68kInstPrinter::printInst(const MCInst *MI, uint64_t Address,
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
-private:
+ private:
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
const char *Modifier = nullptr);
void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
llvm_unreachable("Impossible condition code!");
}
-void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << '$' << StringRef(getRegisterName(RegNo)).lower()
+void MipsInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << '$' << StringRef(getRegisterName(Reg)).lower()
<< markup(">");
}
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
-void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void NVPTXInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
// Decode the virtual register
// Must be kept in sync with NVPTXAsmPrinter::encodeVirtualRegister
- unsigned RCId = (RegNo >> 28);
+ unsigned RCId = (Reg.id() >> 28);
switch (RCId) {
default: report_fatal_error("Bad virtual register encoding");
case 0:
// This is actually a physical register, so defer to the autogenerated
// register printer
- OS << getRegisterName(RegNo);
+ OS << getRegisterName(Reg);
return;
case 1:
OS << "%p";
break;
}
- unsigned VReg = RegNo & 0x0FFFFFFF;
+ unsigned VReg = Reg.id() & 0x0FFFFFFF;
OS << VReg;
}
NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
// End
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
#define PRINT_ALIAS_INSTR
#include "PPCGenAsmWriter.inc"
-void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- const char *RegName = getRegisterName(RegNo);
+void PPCInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ const char *RegName = getRegisterName(Reg);
OS << RegName;
}
const MCRegisterInfo &MRI, Triple T)
: MCInstPrinter(MAI, MII, MRI), TT(T) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
bool printAliasInstr(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &OS);
}
void print(raw_ostream &OS) const override {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return RISCVInstPrinter::getRegisterName(Reg);
else
printAnnotation(O, Annot);
}
-void RISCVInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << getRegisterName(RegNo);
+void RISCVInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << getRegisterName(Reg);
}
void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
O << ".t";
}
-const char *RISCVInstPrinter::getRegisterName(unsigned RegNo) {
- return getRegisterName(RegNo, ArchRegNames ? RISCV::NoRegAltName
- : RISCV::ABIRegAltName);
+const char *RISCVInstPrinter::getRegisterName(MCRegister Reg) {
+ return getRegisterName(Reg, ArchRegNames ? RISCV::NoRegAltName
+ : RISCV::ABIRegAltName);
}
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O, const char *Modifier = nullptr);
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
+ static const char *getRegisterName(MCRegister Reg);
+ static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);
};
} // namespace llvm
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
};
} // namespace llvm
return (STI.getFeatureBits()[Sparc::FeatureV9]) != 0;
}
-void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
-{
- OS << '%' << StringRef(getRegisterName(RegNo)).lower();
+void SparcInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << '%' << StringRef(getRegisterName(Reg)).lower();
}
void SparcInstPrinter::printInst(const MCInst *MI, uint64_t Address,
const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
raw_ostream &OS);
#include "SparcTargetStreamer.h"
#include "SparcInstPrinter.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/Support/FormattedStream.h"
using namespace llvm;
void emitFunctionBodyStart() override;
void emitInstruction(const MachineInstr *MI) override;
- static const char *getRegisterName(unsigned RegNo) {
- return SparcInstPrinter::getRegisterName(RegNo);
+ static const char *getRegisterName(MCRegister Reg) {
+ return SparcInstPrinter::getRegisterName(Reg);
}
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
#include "SystemZInstPrinter.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include "SystemZGenAsmWriter.inc"
-void SystemZInstPrinter::printAddress(const MCAsmInfo *MAI, unsigned Base,
- const MCOperand &DispMO, unsigned Index,
+void SystemZInstPrinter::printAddress(const MCAsmInfo *MAI, MCRegister Base,
+ const MCOperand &DispMO, MCRegister Index,
raw_ostream &O) {
printOperand(DispMO, MAI, O);
if (Base || Index) {
}
void SystemZInstPrinter::printFormattedRegName(const MCAsmInfo *MAI,
- unsigned RegNo,
+ MCRegister Reg,
raw_ostream &O) const {
- const char *RegName = getRegisterName(RegNo);
+ const char *RegName = getRegisterName(Reg);
if (MAI->getAssemblerDialect() == AD_HLASM) {
// Skip register prefix so that only register number is left
assert(isalpha(RegName[0]) && isdigit(RegName[1]));
O << markup("<reg:") << '%' << RegName << markup(">");
}
+void SystemZInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ printFormattedRegName(&MAI, Reg, O);
+}
+
void SystemZInstPrinter::printInst(const MCInst *MI, uint64_t Address,
StringRef Annot, const MCSubtargetInfo &STI,
raw_ostream &O) {
// Automatically generated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
// Print an address with the given base, displacement and index.
- void printAddress(const MCAsmInfo *MAI, unsigned Base,
- const MCOperand &DispMO, unsigned Index, raw_ostream &O);
+ void printAddress(const MCAsmInfo *MAI, MCRegister Base,
+ const MCOperand &DispMO, MCRegister Index, raw_ostream &O);
// Print the given operand.
void printOperand(const MCOperand &MO, const MCAsmInfo *MAI, raw_ostream &O);
- void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo,
+ void printFormattedRegName(const MCAsmInfo *MAI, MCRegister Reg,
raw_ostream &O) const;
// Override MCInstPrinter.
- inline void printRegName(raw_ostream &O, unsigned RegNo) const override {
- printFormattedRegName(&MAI, RegNo, O);
- }
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
#define PRINT_ALIAS_INSTR
#include "VEGenAsmWriter.inc"
-void VEInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void VEInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
// Generic registers have identical register name among register classes.
unsigned AltIdx = VE::AsmName;
// Misc registers have each own name, so no use alt-names.
- if (MRI.getRegClass(VE::MISCRegClassID).contains(RegNo))
+ if (MRI.getRegClass(VE::MISCRegClassID).contains(Reg))
AltIdx = VE::NoRegAltName;
- OS << '%' << getRegisterName(RegNo, AltIdx);
+ OS << '%' << getRegisterName(Reg, AltIdx);
}
void VEInstPrinter::printInst(const MCInst *MI, uint64_t Address,
const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
const MCSubtargetInfo &, raw_ostream &);
void printInstruction(const MCInst *, uint64_t, const MCSubtargetInfo &,
raw_ostream &);
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = VE::NoRegAltName);
void printOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI,
#include "VETargetStreamer.h"
#include "VEInstPrinter.h"
+#include "llvm/MC/MCRegister.h"
using namespace llvm;
void emitInstruction(const MachineInstr *MI) override;
- static const char *getRegisterName(unsigned RegNo) {
- return VEInstPrinter::getRegisterName(RegNo);
+ static const char *getRegisterName(MCRegister Reg) {
+ return VEInstPrinter::getRegisterName(Reg);
}
void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &OS);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
: MCInstPrinter(MAI, MII, MRI) {}
void WebAssemblyInstPrinter::printRegName(raw_ostream &OS,
- unsigned RegNo) const {
- assert(RegNo != WebAssemblyFunctionInfo::UnusedReg);
+ MCRegister Reg) const {
+ assert(Reg.id() != WebAssemblyFunctionInfo::UnusedReg);
// Note that there's an implicit local.get/local.set here!
- OS << "$" << RegNo;
+ OS << "$" << Reg.id();
}
void WebAssemblyInstPrinter::printInst(const MCInst *MI, uint64_t Address,
WebAssemblyInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
};
} // end namespace llvm
#define PRINT_ALIAS_INSTR
#include "X86GenAsmWriter.inc"
-void X86ATTInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
+void X86ATTInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << '%' << getRegisterName(Reg) << markup(">");
}
void X86ATTInstPrinter::printInst(const MCInst *MI, uint64_t Address,
const MCRegisterInfo &MRI)
: X86InstPrinterCommon(MAI, MII, MRI), HasCustomInstComment(false) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &OS);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS) override;
void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
return getVectorRegSize(OpReg) / ScalarSize;
}
-static const char *getRegName(unsigned Reg) {
+static const char *getRegName(MCRegister Reg) {
return X86ATTInstPrinter::getRegisterName(Reg);
}
#define PRINT_ALIAS_INSTR
#include "X86GenAsmWriter1.inc"
-void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << getRegisterName(RegNo) << markup(">");
+void X86IntelInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << getRegisterName(Reg) << markup(">");
}
void X86IntelInstPrinter::printInst(const MCInst *MI, uint64_t Address,
const MCRegisterInfo &MRI)
: X86InstPrinterCommon(MAI, MII, MRI) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) override;
void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
// names. Fortunately most people use the ATT style (outside of Windows)
// and they actually agree on register naming here. Ultimately, this is
// a comment, and so its OK if it isn't perfect.
- auto GetRegisterName = [](unsigned RegNum) -> StringRef {
- return X86ATTInstPrinter::getRegisterName(RegNum);
+ auto GetRegisterName = [](MCRegister Reg) -> StringRef {
+ return X86ATTInstPrinter::getRegisterName(Reg);
};
const MachineOperand &DstOp = MI->getOperand(0);
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include "XCoreGenAsmWriter.inc"
-void XCoreInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << StringRef(getRegisterName(RegNo)).lower();
+void XCoreInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << StringRef(getRegisterName(Reg)).lower();
}
void XCoreInstPrinter::printInst(const MCInst *MI, uint64_t Address,
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/raw_ostream.h"
printAnnotation(O, Annot);
}
-void XtensaInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << getRegisterName(RegNo);
+void XtensaInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << getRegisterName(Reg);
}
void XtensaInstPrinter::printOperand(const MCInst *MI, int OpNum,
// Automatically generated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
// Print the given operand.
static void printOperand(const MCOperand &MO, raw_ostream &O);
// Override MCInstPrinter.
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
"/// for the specified register.\n"
"const char *" << Target.getName() << ClassName << "::";
if (hasAltNames)
- O << "\ngetRegisterName(unsigned RegNo, unsigned AltIdx) {\n";
+ O << "\ngetRegisterName(MCRegister Reg, unsigned AltIdx) {\n";
else
- O << "getRegisterName(unsigned RegNo) {\n";
- O << " assert(RegNo && RegNo < " << (Registers.size()+1)
+ O << "getRegisterName(MCRegister Reg) {\n";
+ O << " unsigned RegNo = Reg.id();\n"
+ << " assert(RegNo && RegNo < " << (Registers.size() + 1)
<< " && \"Invalid register number!\");\n"
<< "\n";