soundwire/ASOC: Intel: update offsets for LunarLake

The previous settings are not applicable, use a flag to determine what
the register layout is.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230515071042.2038-5-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h
index 09d479f..51aa42a 100644 (file)
--- a/drivers/soundwire/intel.h
+++ b/drivers/soundwire/intel.h
@@ -11,6 +11,7 @@
  * @mmio_base: mmio base of SoundWire registers
  * @registers: Link IO registers base
  * @shim: Audio shim pointer
+ * @shim_vs: Audio vendor-specific shim pointer
  * @alh: ALH (Audio Link Hub) pointer
  * @irq: Interrupt line
  * @ops: Shim callback ops
@@ -28,6 +29,7 @@ struct sdw_intel_link_res {
        void __iomem *mmio_base; /* not strictly needed, useful for debug */
        void __iomem *registers;
        void __iomem *shim;
+       void __iomem *shim_vs;
        void __iomem *alh;
        int irq;
        const struct sdw_intel_ops *ops;

diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c
index cbe56b9..e0023af 100644 (file)
--- a/drivers/soundwire/intel_init.c
+++ b/drivers/soundwire/intel_init.c
@@ -63,10 +63,16 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res *
        link = &ldev->link_res;
        link->hw_ops = res->hw_ops;
        link->mmio_base = res->mmio_base;
-       link->registers = res->mmio_base + SDW_LINK_BASE
-               + (SDW_LINK_SIZE * link_id);
-       link->shim = res->mmio_base + res->shim_base;
-       link->alh = res->mmio_base + res->alh_base;
+       if (!res->ext) {
+               link->registers = res->mmio_base + SDW_LINK_BASE
+                       + (SDW_LINK_SIZE * link_id);
+               link->shim = res->mmio_base + res->shim_base;
+               link->alh = res->mmio_base + res->alh_base;
+       } else {
+               link->registers = res->mmio_base + SDW_IP_BASE(link_id);
+               link->shim = res->mmio_base +  SDW_SHIM2_GENERIC_BASE(link_id);
+               link->shim_vs = res->mmio_base + SDW_SHIM2_VS_BASE(link_id);
+       }
 
        link->ops = res->ops;
        link->dev = res->dev;

diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 66687e8..88eb5bf 100644 (file)
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -323,6 +323,7 @@ struct sdw_intel_ctx {
  * DSP driver. The quirks are common for all links for now.
  * @shim_base: sdw shim base.
  * @alh_base: sdw alh base.
+ * @ext: extended HDaudio link support
  */
 struct sdw_intel_res {
        const struct sdw_intel_hw_ops *hw_ops;
@@ -337,6 +338,7 @@ struct sdw_intel_res {
        u32 clock_stop_quirks;
        u32 shim_base;
        u32 alh_base;
+       bool ext;
 };
 
 /*

diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c
index 3153e21..793baf6 100644 (file)
--- a/sound/soc/sof/intel/hda.c
+++ b/sound/soc/sof/intel/hda.c
@@ -158,6 +158,7 @@ static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
 
 static int hda_sdw_probe(struct snd_sof_dev *sdev)
 {
+       const struct sof_intel_dsp_desc *chip;
        struct sof_intel_hda_dev *hdev;
        struct sdw_intel_res res;
        void *sdw;
@@ -166,10 +167,22 @@ static int hda_sdw_probe(struct snd_sof_dev *sdev)
 
        memset(&res, 0, sizeof(res));
 
-       res.hw_ops = &sdw_intel_cnl_hw_ops;
-       res.mmio_base = sdev->bar[HDA_DSP_BAR];
-       res.shim_base = hdev->desc->sdw_shim_base;
-       res.alh_base = hdev->desc->sdw_alh_base;
+       chip = get_chip_info(sdev->pdata);
+       if (chip->hw_ip_version < SOF_INTEL_ACE_2_0) {
+               res.mmio_base = sdev->bar[HDA_DSP_BAR];
+               res.hw_ops = &sdw_intel_cnl_hw_ops;
+               res.shim_base = hdev->desc->sdw_shim_base;
+               res.alh_base = hdev->desc->sdw_alh_base;
+               res.ext = false;
+       } else {
+               res.mmio_base = sdev->bar[HDA_DSP_HDA_BAR];
+               /*
+                * the SHIM and SoundWire register offsets are link-specific
+                * and will be determined when adding auxiliary devices
+                */
+               res.hw_ops = &sdw_intel_lnl_hw_ops;
+               res.ext = true;
+       }
        res.irq = sdev->ipc_irq;
        res.handle = hdev->info.handle;
        res.parent = sdev->dev;