clk: renesas: rcar-gen3: Pass name/offset to cpg_sd_clk_register()
authorGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 1 Mar 2019 11:07:15 +0000 (12:07 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 18 Mar 2019 16:03:57 +0000 (17:03 +0100)
Explicitly pass the clock's name and register offset to
cpg_sd_clk_register(), so the latter doesn't have to extract them from
the cpg_core_clk object.

This keeps all cpg_core_clk parsing and unmarshalling contained in a
single function (rcar_gen3_cpg_clk_register()).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
drivers/clk/renesas/rcar-gen3-cpg.c

index 9a8071a..dcd4ac3 100644 (file)
@@ -369,8 +369,8 @@ static u32 cpg_quirks __initdata;
 #define RCKCR_CKSEL    BIT(1)          /* Manual RCLK parent selection */
 #define SD_SKIP_FIRST  BIT(2)          /* Skip first clock in SD table */
 
-static struct clk * __init cpg_sd_clk_register(const struct cpg_core_clk *core,
-       void __iomem *base, const char *parent_name,
+static struct clk * __init cpg_sd_clk_register(const char *name,
+       void __iomem *base, unsigned int offset, const char *parent_name,
        struct raw_notifier_head *notifiers)
 {
        struct clk_init_data init;
@@ -383,13 +383,13 @@ static struct clk * __init cpg_sd_clk_register(const struct cpg_core_clk *core,
        if (!clock)
                return ERR_PTR(-ENOMEM);
 
-       init.name = core->name;
+       init.name = name;
        init.ops = &cpg_sd_clock_ops;
        init.flags = CLK_SET_RATE_PARENT;
        init.parent_names = &parent_name;
        init.num_parents = 1;
 
-       clock->csn.reg = base + core->offset;
+       clock->csn.reg = base + offset;
        clock->hw.init = &init;
        clock->div_table = cpg_sd_div_table;
        clock->div_num = ARRAY_SIZE(cpg_sd_div_table);
@@ -606,8 +606,8 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
                break;
 
        case CLK_TYPE_GEN3_SD:
-               return cpg_sd_clk_register(core, base, __clk_get_name(parent),
-                                          notifiers);
+               return cpg_sd_clk_register(core->name, base, core->offset,
+                                          __clk_get_name(parent), notifiers);
 
        case CLK_TYPE_GEN3_R:
                if (cpg_quirks & RCKCR_CKSEL) {