radv: fix streamout with different streams in the same varying slot
authorRhys Perry <pendingchaos02@gmail.com>
Fri, 2 Dec 2022 18:05:21 +0000 (18:05 +0000)
committerMarge Bot <emma+marge@anholt.net>
Fri, 9 Dec 2022 17:30:24 +0000 (17:30 +0000)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20137>

src/amd/vulkan/radv_shader_info.c

index 013ef76..de74482 100644 (file)
@@ -94,6 +94,11 @@ gather_intrinsic_store_output_info(const nir_shader *nir, const nir_intrinsic_in
          output_usage_mask[idx + i] |= ((write_mask >> (i * 4)) & 0xf) << component;
       }
    }
+
+   if (nir->info.stage == MESA_SHADER_GEOMETRY) {
+      uint8_t gs_streams = nir_intrinsic_io_semantics(instr).gs_streams;
+      info->gs.output_streams[idx] |= gs_streams << (component * 2);
+   }
 }
 
 static void
@@ -459,12 +464,10 @@ gather_shader_info_gs(const nir_shader *nir, struct radv_shader_info *info)
    nir_foreach_shader_out_variable(var, nir) {
       unsigned num_components = glsl_get_component_slots(var->type);
       unsigned stream = var->data.stream;
-      unsigned idx = var->data.location;
 
       assert(stream < 4);
 
       info->gs.num_stream_output_components[stream] += num_components;
-      info->gs.output_streams[idx] = stream | (stream << 2) | (stream << 4) | (stream << 6);
    }
 }