riscv: sifive: fu540: redundant initialization
authorHeinrich Schuchardt <xypron.glpk@gmx.de>
Mon, 3 Aug 2020 21:09:49 +0000 (23:09 +0200)
committerAndes <uboot@andestech.com>
Fri, 14 Aug 2020 06:39:14 +0000 (14:39 +0800)
We should not initialize a variable if the value is overwritten before
being read.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
arch/riscv/cpu/fu540/cache.c

index 9ee364b..54de142 100644 (file)
@@ -22,7 +22,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int cache_enable_ways(void)
 {
        const void *blob = gd->fdt_blob;
-       int node = (-FDT_ERR_NOTFOUND);
+       int node;
        fdt_addr_t base;
        u32 config;
        u32 ways;