/* ...likewise -mfix-vr4130. */
static int mips_fix_vr4130;
+/* ...likewise -mfix-24k. */
+static int mips_fix_24k;
+
/* We don't relax branches by default, since this causes us to expand
`la .l2 - .l1' if there's a branch between .l1 and .l2, because we
fail to compute the offset before expanding the macro to the most
return reg >= 0;
}
+#define INSN_ERET 0x42000018
+#define INSN_DERET 0x4200001f
+
+/* Implement the ERET/DERET Errata for MIPS 24k.
+
+ If an ERET/DERET is encountered in a noreorder block,
+ warn if the ERET/DERET is followed by a branch instruction.
+ Also warn if the ERET/DERET is the last instruction in the
+ noreorder block.
+
+ IF an ERET/DERET is in a reorder block and is followed by a
+ branch instruction, insert a nop. */
+
+static void
+check_for_24k_errata (struct mips_cl_insn *insn, int eret_ndx)
+{
+ bfd_boolean next_insn_is_branch = FALSE;
+
+ /* eret_ndx will be -1 for the last instruction in a section
+ and the ERET/DERET will be in insn, not history. */
+ if (insn
+ && eret_ndx == -1
+ && (insn->insn_opcode == INSN_ERET
+ || insn->insn_opcode == INSN_DERET)
+ && insn->noreorder_p)
+ {
+ as_warn (_("ERET and DERET must be followed by a NOP on the 24K."));
+ return;
+ }
+
+ if (history[eret_ndx].insn_opcode != INSN_ERET
+ && history[eret_ndx].insn_opcode != INSN_DERET)
+ return;
+
+ if (!insn)
+ {
+ if (history[eret_ndx].noreorder_p)
+ as_warn (_("ERET and DERET must be followed by a NOP on the 24K."));
+ return;
+ }
+
+ next_insn_is_branch = ((insn->insn_opcode == INSN_ERET)
+ || (insn->insn_opcode == INSN_DERET)
+ || (insn->insn_mo->pinfo
+ & (INSN_UNCOND_BRANCH_DELAY
+ | INSN_COND_BRANCH_DELAY
+ | INSN_COND_BRANCH_LIKELY)));
+
+ if (next_insn_is_branch && history[eret_ndx].noreorder_p)
+ {
+ as_warn (_("ERET and DERET must be followed by a NOP on the 24K."));
+ return;
+ }
+
+ /* Emit nop if the next instruction is a branch. */
+ if (next_insn_is_branch)
+ {
+ long nop_where, br_where;
+ struct frag *nop_frag, *br_frag;
+ struct mips_cl_insn br_insn, nop_insn;
+
+ emit_nop ();
+
+ nop_insn = history[eret_ndx - 1];
+ nop_frag = history[eret_ndx - 1].frag;
+ nop_where = history[eret_ndx - 1].where;
+
+ br_insn = history[eret_ndx];
+ br_frag = history[eret_ndx].frag;
+ br_where = history[eret_ndx].where;
+
+ move_insn (&nop_insn, br_frag, br_where);
+ move_insn (&br_insn, nop_frag, nop_where);
+
+ history[eret_ndx-1] = br_insn;
+ history[eret_ndx] = nop_insn;
+ }
+}
+
/* Return TRUE if opcode MO is valid on the currently selected ISA and
architecture. If EXPANSIONP is TRUE then this check is done while
expanding a macro. Use is_opcode_valid_16 for MIPS16 opcodes. */
void
md_mips_end (void)
{
+ if (mips_fix_24k)
+ check_for_24k_errata ((struct mips_cl_insn *) &history[0], -1);
+
if (! ECOFF_DEBUGGING)
md_obj_end ();
}
bfd_reloc_code_real_type *reloc_type)
{
unsigned long prev_pinfo, pinfo;
+ int hndx_24k = 0;
relax_stateT prev_insn_frag_type = 0;
bfd_boolean relaxed_branch = FALSE;
segment_info_type *si = seg_info (now_seg);
|| (mips_opts.mips16 && history[0].fixp[0])
/* If the previous instruction is a sync, sync.l, or
sync.p, we can not swap. */
- || (prev_pinfo & INSN_SYNC))
+ || (prev_pinfo & INSN_SYNC)
+ /* If the previous instruction is an ERET or
+ DERET, avoid the swap. */
+ || (history[0].insn_opcode == INSN_ERET)
+ || (history[0].insn_opcode == INSN_DERET))
{
if (mips_opts.mips16
&& (pinfo & INSN_UNCOND_BRANCH_DELAY)
slot, and bump the destination address. */
insert_into_history (0, 1, ip);
emit_nop ();
+ if (mips_fix_24k)
+ hndx_24k++;
}
if (mips_relax.sequence)
/* If that was an unconditional branch, forget the previous
insn information. */
if (pinfo & INSN_UNCOND_BRANCH_DELAY)
- mips_no_prev_insn ();
+ {
+ /* Check for eret/deret before clearing history. */
+ if (mips_fix_24k)
+ check_for_24k_errata (
+ (struct mips_cl_insn *) &history[hndx_24k],
+ hndx_24k+1);
+ mips_no_prev_insn ();
+ }
}
else if (pinfo & INSN_COND_BRANCH_LIKELY)
{
the next instruction. */
insert_into_history (0, 1, ip);
emit_nop ();
+ if (mips_fix_24k)
+ hndx_24k++;
}
else
insert_into_history (0, 1, ip);
else
insert_into_history (0, 1, ip);
+ if (mips_fix_24k)
+ check_for_24k_errata ((struct mips_cl_insn *) &history[hndx_24k],
+ hndx_24k+1);
+
/* We just output an insn, so the next one doesn't have a label. */
mips_clear_insn_labels ();
}
static void
end_noreorder (void)
{
+ if (mips_fix_24k)
+ check_for_24k_errata (NULL, 0);
+
mips_opts.noreorder--;
if (mips_opts.noreorder == 0 && prev_nop_frag != NULL)
{
OPTION_M3900,
OPTION_NO_M3900,
OPTION_M7000_HILO_FIX,
- OPTION_MNO_7000_HILO_FIX,
+ OPTION_MNO_7000_HILO_FIX,
+ OPTION_FIX_24K,
+ OPTION_NO_FIX_24K,
OPTION_FIX_VR4120,
OPTION_NO_FIX_VR4120,
OPTION_FIX_VR4130,
{"mno-fix-vr4120", no_argument, NULL, OPTION_NO_FIX_VR4120},
{"mfix-vr4130", no_argument, NULL, OPTION_FIX_VR4130},
{"mno-fix-vr4130", no_argument, NULL, OPTION_NO_FIX_VR4130},
+ {"mfix-24k", no_argument, NULL, OPTION_FIX_24K},
+ {"mno-fix-24k", no_argument, NULL, OPTION_NO_FIX_24K},
/* Miscellaneous options. */
{"trap", no_argument, NULL, OPTION_TRAP},
mips_opts.ase_smartmips = 0;
break;
+ case OPTION_FIX_24K:
+ mips_fix_24k = 1;
+ break;
+
+ case OPTION_NO_FIX_24K:
+ mips_fix_24k = 0;
+ break;
+
case OPTION_FIX_VR4120:
mips_fix_vr4120 = 1;
break;
#endif
mips_emit_delays ();
+
+ if (mips_fix_24k)
+ check_for_24k_errata ((struct mips_cl_insn *) &history[0], -1);
+
switch (sec)
{
case 't':
if (!IS_ELF)
return;
+ if (mips_fix_24k)
+ check_for_24k_errata ((struct mips_cl_insn *) &history[0], -1);
+
section_name = input_line_pointer;
c = get_symbol_end ();
if (c)
fprintf (stream, _("\
-mfix-vr4120 work around certain VR4120 errata\n\
-mfix-vr4130 work around VR4130 mflo/mfhi errata\n\
+-mfix-24k insert a nop after ERET and DERET instructions\n\
-mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\
-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\
-msym32 assume all symbols have 32-bit values\n\