phy: ti: gmii-sel: Add support for SGMII mode
authorSiddharth Vadapalli <s-vadapalli@ti.com>
Thu, 9 Mar 2023 06:35:12 +0000 (12:05 +0530)
committerVinod Koul <vkoul@kernel.org>
Tue, 16 May 2023 14:30:51 +0000 (20:00 +0530)
Add support to configure the CPSW MAC's PHY in SGMII mode if the SoC
supports it. The extra_modes member of the phy_gmii_sel_soc_data struct
corresponding to the SoC is used to determine whether or not the SoC
supports SGMII mode.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230309063514.398705-2-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/ti/phy-gmii-sel.c

index 8c66781..5e16d8d 100644 (file)
@@ -23,6 +23,7 @@
 #define AM33XX_GMII_SEL_MODE_RGMII     2
 
 /* J72xx SoC specific definitions for the CONTROL port */
+#define J72XX_GMII_SEL_MODE_SGMII      3
 #define J72XX_GMII_SEL_MODE_QSGMII     4
 #define J72XX_GMII_SEL_MODE_QSGMII_SUB 6
 
@@ -106,6 +107,13 @@ static int phy_gmii_sel_mode(struct phy *phy, enum phy_mode mode, int submode)
                        gmii_sel_mode = J72XX_GMII_SEL_MODE_QSGMII_SUB;
                break;
 
+       case PHY_INTERFACE_MODE_SGMII:
+               if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_SGMII)))
+                       goto unsupported;
+               else
+                       gmii_sel_mode = J72XX_GMII_SEL_MODE_SGMII;
+               break;
+
        default:
                goto unsupported;
        }