drm/exynos: add hdmiphy power on/off sequence
authorShirish S <s.shirish@samsung.com>
Thu, 3 Apr 2014 15:11:02 +0000 (20:41 +0530)
committerInki Dae <daeinki@gmail.com>
Sun, 1 Jun 2014 17:07:15 +0000 (02:07 +0900)
This patch implements the power on/off sequence
of HDMI PHY in exynos5420 and exynos5250 as provided
by the hardware team.

This has been verified for mulitple iterations of
S2R.

Signed-off-by: Shirish S <s.shirish@samsung.com>
Signed-off-by: Rahul Sharma <Rahul.Sharma@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
drivers/gpu/drm/exynos/exynos_hdmi.c
drivers/gpu/drm/exynos/regs-hdmi.h

index e05c86a..d0f4f5d 100644 (file)
@@ -1683,16 +1683,44 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 
 static void hdmiphy_poweron(struct hdmi_context *hdata)
 {
-       if (hdata->type == HDMI_TYPE14)
-               hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0,
-                       HDMI_PHY_POWER_OFF_EN);
+       if (hdata->type != HDMI_TYPE14)
+               return;
+
+       DRM_DEBUG_KMS("\n");
+
+       /* For PHY Mode Setting */
+       hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE,
+                               HDMI_PHY_ENABLE_MODE_SET);
+       /* Phy Power On */
+       hdmiphy_reg_writeb(hdata, HDMIPHY_POWER,
+                               HDMI_PHY_POWER_ON);
+       /* For PHY Mode Setting */
+       hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE,
+                               HDMI_PHY_DISABLE_MODE_SET);
+       /* PHY SW Reset */
+       hdmiphy_conf_reset(hdata);
 }
 
 static void hdmiphy_poweroff(struct hdmi_context *hdata)
 {
-       if (hdata->type == HDMI_TYPE14)
-               hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0,
-                       HDMI_PHY_POWER_OFF_EN);
+       if (hdata->type != HDMI_TYPE14)
+               return;
+
+       DRM_DEBUG_KMS("\n");
+
+       /* PHY SW Reset */
+       hdmiphy_conf_reset(hdata);
+       /* For PHY Mode Setting */
+       hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE,
+                               HDMI_PHY_ENABLE_MODE_SET);
+
+       /* PHY Power Off */
+       hdmiphy_reg_writeb(hdata, HDMIPHY_POWER,
+                               HDMI_PHY_POWER_OFF);
+
+       /* For PHY Mode Setting */
+       hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE,
+                               HDMI_PHY_DISABLE_MODE_SET);
 }
 
 static void hdmiphy_conf_apply(struct hdmi_context *hdata)
index 6d846b9..3f35ac6 100644 (file)
 #define HDMI_TG_3D                     HDMI_TG_BASE(0x00F0)
 
 /* HDMI PHY Registers Offsets*/
-#define HDMIPHY_MODE_SET_DONE          (0x7C >> 2)
+#define HDMIPHY_POWER          (0x74 >> 2)
+#define HDMIPHY_MODE_SET_DONE          (0x7c >> 2)
+
+/* HDMI PHY Values */
+#define HDMI_PHY_POWER_ON              0x80
+#define HDMI_PHY_POWER_OFF             0xff
 
 /* HDMI PHY Values */
 #define HDMI_PHY_DISABLE_MODE_SET      0x80