Add virtual method `access` to `ITensor` and derived classes.
Signed-off-by: Sergei Barannikov <s.barannikov@samsung.com>
--- /dev/null
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ICLTensor.h"
+
+#include <arm_compute/runtime/CL/CLScheduler.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+void ICLTensor::access(const std::function<void(ITensor &tensor)> &fn)
+{
+ auto &queue = ::arm_compute::CLScheduler::get().queue();
+
+ // This is an optional input
+ if (total_size() == 0)
+ return;
+
+ map(queue);
+ fn(*this);
+ unmap(queue);
+}
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
public:
void map(cl::CommandQueue &q, bool blocking = true) { return handle()->map(q, blocking); }
void unmap(cl::CommandQueue &q) { return handle()->unmap(q); }
+ void access(const std::function<void(ITensor &tensor)> &fn) final;
};
} // namespace operand
--- /dev/null
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "INETensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace operand
+{
+
+void INETensor::access(const std::function<void(ITensor &tensor)> &fn) { fn(*this); }
+
+} // namespace operand
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
public:
const arm_compute::ITensor *handle() const override = 0;
arm_compute::ITensor *handle() override = 0;
+ void access(const std::function<void(ITensor &tensor)> &fn) final;
};
} // namespace operand
return offset;
}
+void Tensor::access(const std::function<void(ITensor &)> &fn) { fn(*this); }
+
} // namespace operand
} // namespace cpu
} // namespace backend
size_t calcOffset(const neurun::util::Coordinates &coords) const override;
model::Layout layout() const override { return model::Layout::NHWC; }
bool has_padding() const override { return false; }
+ void access(const std::function<void(ITensor &tensor)> &fn) final;
private:
model::OperandInfo _info;
return offset;
}
+void Tensor::access(const std::function<void(ITensor &)> &fn) { fn(*this); }
+
} // namespace operand
} // namespace srcn
} // namespace backend
size_t calcOffset(const neurun::util::Coordinates &coords) const override;
model::Layout layout() const override { return _layout; }
bool has_padding() const override { return false; }
+ void access(const std::function<void(ITensor &tensor)> &fn) final;
private:
model::OperandInfo _info;
#include <cstring>
#include <cstdint>
+#include <functional>
#include "model/Layout.h"
#include "util/Coordinates.h"
virtual size_t calcOffset(const neurun::util::Coordinates &coords) const = 0;
virtual model::Layout layout() const = 0;
virtual bool has_padding() const = 0;
+ virtual void access(const std::function<void(ITensor &tensor)> &fn) = 0;
};
} // namespace operand
namespace interp
{
+void ITensor::access(const std::function<void(backend::operand::ITensor &tensor)> &fn)
+{
+ fn(*this);
+}
+
size_t ROTensor::calcOffset(const neurun::util::Coordinates &coords) const
{
NO_USE(coords);
* @return Number of elements
*/
virtual uint64_t num_elements() const = 0;
+ void access(const std::function<void(backend::operand::ITensor &tensor)> &fn) final;
};
/**