crypto: qat - set CIPHER capability for DH895XCC
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Thu, 7 Apr 2022 16:54:40 +0000 (17:54 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 15 Apr 2022 08:34:25 +0000 (16:34 +0800)
Set the CIPHER capability for QAT DH895XCC devices if the hardware supports
it. This is done if both the CIPHER and the AUTHENTICATION engines are
available on the device.

Fixes: ad1332aa67ec ("crypto: qat - add support for capability detection")
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c

index 09599fe..ff13047 100644 (file)
@@ -58,17 +58,23 @@ static u32 get_accel_cap(struct adf_accel_dev *accel_dev)
 
        capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC |
                       ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC |
-                      ICP_ACCEL_CAPABILITIES_AUTHENTICATION;
+                      ICP_ACCEL_CAPABILITIES_AUTHENTICATION |
+                      ICP_ACCEL_CAPABILITIES_CIPHER;
 
        /* Read accelerator capabilities mask */
        pci_read_config_dword(pdev, ADF_DEVICE_LEGFUSE_OFFSET, &legfuses);
 
-       if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE)
+       /* A set bit in legfuses means the feature is OFF in this SKU */
+       if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) {
                capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC;
+               capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER;
+       }
        if (legfuses & ICP_ACCEL_MASK_PKE_SLICE)
                capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC;
-       if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE)
+       if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) {
                capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION;
+               capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER;
+       }
        if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE)
                capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION;