radeonsi: never set DISABLE_WR_CONFIRM for CP DMA clears and copies
authorMarek Olšák <marek.olsak@amd.com>
Fri, 19 Mar 2021 22:48:04 +0000 (18:48 -0400)
committerMarge Bot <eric+marge@anholt.net>
Fri, 2 Apr 2021 12:05:00 +0000 (12:05 +0000)
Only prefetches set it. Unsynchronized clears and copies shouldn't set it
because syncing later wouldn't wait for the writes.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>

src/gallium/drivers/radeonsi/si_cp_dma.c

index 5cd30e5..5c1cd39 100644 (file)
@@ -70,12 +70,6 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui
    /* Sync flags. */
    if (flags & CP_DMA_SYNC)
       header |= S_411_CP_SYNC(1);
-   else {
-      if (sctx->chip_class >= GFX9)
-         command |= S_414_DISABLE_WR_CONFIRM_GFX9(1);
-      else
-         command |= S_414_DISABLE_WR_CONFIRM_GFX6(1);
-   }
 
    if (flags & CP_DMA_RAW_WAIT)
       command |= S_414_RAW_WAIT(1);