net: mscc: ocelot: expose generic phylink_mac_config routine
authorColin Foster <colin.foster@in-advantage.com>
Fri, 17 Mar 2023 18:54:10 +0000 (11:54 -0700)
committerDavid S. Miller <davem@davemloft.net>
Mon, 20 Mar 2023 09:08:48 +0000 (09:08 +0000)
The ocelot-switch driver can utilize the phylink_mac_config routine. Move
this to the ocelot library location and export the symbol to make this
possible.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mscc/ocelot.c
drivers/net/ethernet/mscc/ocelot_net.c
include/soc/mscc/ocelot.h

index 9b8403e..8292e93 100644 (file)
@@ -809,6 +809,32 @@ static int ocelot_port_flush(struct ocelot *ocelot, int port)
        return err;
 }
 
+void ocelot_phylink_mac_config(struct ocelot *ocelot, int port,
+                              unsigned int link_an_mode,
+                              const struct phylink_link_state *state)
+{
+       struct ocelot_port *ocelot_port = ocelot->ports[port];
+
+       /* Disable HDX fast control */
+       ocelot_port_writel(ocelot_port, DEV_PORT_MISC_HDX_FAST_DIS,
+                          DEV_PORT_MISC);
+
+       /* SGMII only for now */
+       ocelot_port_writel(ocelot_port, PCS1G_MODE_CFG_SGMII_MODE_ENA,
+                          PCS1G_MODE_CFG);
+       ocelot_port_writel(ocelot_port, PCS1G_SD_CFG_SD_SEL, PCS1G_SD_CFG);
+
+       /* Enable PCS */
+       ocelot_port_writel(ocelot_port, PCS1G_CFG_PCS_ENA, PCS1G_CFG);
+
+       /* No aneg on SGMII */
+       ocelot_port_writel(ocelot_port, 0, PCS1G_ANEG_CFG);
+
+       /* No loopback */
+       ocelot_port_writel(ocelot_port, 0, PCS1G_LB_CFG);
+}
+EXPORT_SYMBOL_GPL(ocelot_phylink_mac_config);
+
 void ocelot_phylink_mac_link_down(struct ocelot *ocelot, int port,
                                  unsigned int link_an_mode,
                                  phy_interface_t interface,
index ca4bde8..590a2b2 100644 (file)
@@ -1675,25 +1675,10 @@ static void vsc7514_phylink_mac_config(struct phylink_config *config,
 {
        struct net_device *ndev = to_net_dev(config->dev);
        struct ocelot_port_private *priv = netdev_priv(ndev);
-       struct ocelot_port *ocelot_port = &priv->port;
-
-       /* Disable HDX fast control */
-       ocelot_port_writel(ocelot_port, DEV_PORT_MISC_HDX_FAST_DIS,
-                          DEV_PORT_MISC);
-
-       /* SGMII only for now */
-       ocelot_port_writel(ocelot_port, PCS1G_MODE_CFG_SGMII_MODE_ENA,
-                          PCS1G_MODE_CFG);
-       ocelot_port_writel(ocelot_port, PCS1G_SD_CFG_SD_SEL, PCS1G_SD_CFG);
-
-       /* Enable PCS */
-       ocelot_port_writel(ocelot_port, PCS1G_CFG_PCS_ENA, PCS1G_CFG);
-
-       /* No aneg on SGMII */
-       ocelot_port_writel(ocelot_port, 0, PCS1G_ANEG_CFG);
+       struct ocelot *ocelot = priv->port.ocelot;
+       int port = priv->port.index;
 
-       /* No loopback */
-       ocelot_port_writel(ocelot_port, 0, PCS1G_LB_CFG);
+       ocelot_phylink_mac_config(ocelot, port, link_an_mode, state);
 }
 
 static void vsc7514_phylink_mac_link_down(struct phylink_config *config,
index 751d9b2..87ade87 100644 (file)
@@ -1111,6 +1111,9 @@ int ocelot_sb_occ_tc_port_bind_get(struct ocelot *ocelot, int port,
                                   enum devlink_sb_pool_type pool_type,
                                   u32 *p_cur, u32 *p_max);
 
+void ocelot_phylink_mac_config(struct ocelot *ocelot, int port,
+                              unsigned int link_an_mode,
+                              const struct phylink_link_state *state);
 void ocelot_phylink_mac_link_down(struct ocelot *ocelot, int port,
                                  unsigned int link_an_mode,
                                  phy_interface_t interface,