spi: ti_qspi: Fix failure on multiple READ_ID cmd
authorVignesh R <vigneshr@ti.com>
Fri, 22 Jul 2016 05:25:48 +0000 (10:55 +0530)
committerJagan Teki <jteki@openedev.com>
Fri, 29 Jul 2016 18:45:00 +0000 (00:15 +0530)
Populating QSPI_RD_SNGL bit(0x1) in priv->cmd means that value
QSPI_INVAL (0x4) is not written to CMD field of QSPI_SPI_CMD_REG in
ti_qspi_cs_deactivate(). Therefore CS is never deactivated between
successive READ ID which results in sf probe to fail.
Fix this by not populating priv->cmd with QSPI_RD_SNGL and OR it wih
priv->cmd as required (similar to the convention followed in the
driver).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
drivers/spi/ti_qspi.c

index 9a372ad..a850aa2 100644 (file)
@@ -247,13 +247,12 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen,
                        debug("tx done, status %08x\n", status);
                }
                if (rxp) {
-                       priv->cmd |= QSPI_RD_SNGL;
                        debug("rx cmd %08x dc %08x\n",
-                             priv->cmd, priv->dc);
+                             ((u32)(priv->cmd | QSPI_RD_SNGL)), priv->dc);
                        #ifdef CONFIG_DRA7XX
                                udelay(500);
                        #endif
-                       writel(priv->cmd, &priv->base->cmd);
+                       writel(priv->cmd | QSPI_RD_SNGL, &priv->base->cmd);
                        status = readl(&priv->base->status);
                        timeout = QSPI_TIMEOUT;
                        while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {