return new SIInsertWaitcnts();
}
+static bool updateOperandIfDifferent(MachineInstr &MI, uint16_t OpName,
+ unsigned NewEnc) {
+ int OpIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), OpName);
+ assert(OpIdx >= 0);
+
+ MachineOperand &MO = MI.getOperand(OpIdx);
+
+ if (NewEnc == MO.getImm())
+ return false;
+
+ MO.setImm(NewEnc);
+ return true;
+}
+
/// Combine consecutive waitcnt instructions that precede \p It and follow
/// \p OldWaitcntInstr and apply any extra wait from waitcnt that were added
/// by previous passes. Currently this pass conservatively assumes that these
// Updated encoding of merged waitcnt with the required wait.
if (WaitcntInstr) {
if (Wait.hasWaitExceptVsCnt()) {
- unsigned NewEnc = AMDGPU::encodeWaitcnt(IV, Wait);
- unsigned OldEnc = WaitcntInstr->getOperand(0).getImm();
- if (OldEnc != NewEnc) {
- WaitcntInstr->getOperand(0).setImm(NewEnc);
- Modified = true;
- }
+ Modified |=
+ updateOperandIfDifferent(*WaitcntInstr, AMDGPU::OpName::simm16,
+ AMDGPU::encodeWaitcnt(IV, Wait));
ScoreBrackets.applyWaitcnt(Wait);
Wait.VmCnt = ~0u;
Wait.LgkmCnt = ~0u;
if (WaitcntVsCntInstr) {
if (Wait.hasWaitVsCnt()) {
assert(ST->hasVscnt());
- unsigned OldVSCnt =
- TII->getNamedOperand(*WaitcntVsCntInstr, AMDGPU::OpName::simm16)
- ->getImm();
- if (Wait.VsCnt != OldVSCnt) {
- TII->getNamedOperand(*WaitcntVsCntInstr, AMDGPU::OpName::simm16)
- ->setImm(Wait.VsCnt);
- Modified = true;
- }
+ Modified |= updateOperandIfDifferent(*WaitcntVsCntInstr,
+ AMDGPU::OpName::simm16, Wait.VsCnt);
ScoreBrackets.applyWaitcnt(Wait);
Wait.VsCnt = ~0u;