#define NUM_DEPTH_CLEAR_PIPELINES 2
#define NUM_DEPTH_DECOMPRESS_PIPELINES 3
+#define MAX_FRAMEBUFFER_WIDTH (1u << 14)
+#define MAX_FRAMEBUFFER_HEIGHT (1u << 14)
/*
* This is the point we switch from using CP to compute shader
.minInterpolationOffset = -2,
.maxInterpolationOffset = 2,
.subPixelInterpolationOffsetBits = 8,
- .maxFramebufferWidth = (1 << 14),
- .maxFramebufferHeight = (1 << 14),
+ .maxFramebufferWidth = MAX_FRAMEBUFFER_WIDTH,
+ .maxFramebufferHeight = MAX_FRAMEBUFFER_HEIGHT,
.maxFramebufferLayers = (1 << 10),
.framebufferColorSampleCounts = sample_counts,
.framebufferDepthSampleCounts = sample_counts,
S_028204_WINDOW_OFFSET_DISABLE(1));
radeon_set_context_reg(cs, R_028240_PA_SC_GENERIC_SCISSOR_TL,
S_028240_WINDOW_OFFSET_DISABLE(1));
- radeon_set_context_reg(cs, R_028244_PA_SC_GENERIC_SCISSOR_BR,
- S_028244_BR_X(16384) | S_028244_BR_Y(16384));
+ radeon_set_context_reg(
+ cs, R_028244_PA_SC_GENERIC_SCISSOR_BR,
+ S_028244_BR_X(MAX_FRAMEBUFFER_WIDTH) | S_028244_BR_Y(MAX_FRAMEBUFFER_HEIGHT));
radeon_set_context_reg(cs, R_028030_PA_SC_SCREEN_SCISSOR_TL, 0);
- radeon_set_context_reg(cs, R_028034_PA_SC_SCREEN_SCISSOR_BR,
- S_028034_BR_X(16384) | S_028034_BR_Y(16384));
+ radeon_set_context_reg(
+ cs, R_028034_PA_SC_SCREEN_SCISSOR_BR,
+ S_028034_BR_X(MAX_FRAMEBUFFER_WIDTH) | S_028034_BR_Y(MAX_FRAMEBUFFER_HEIGHT));
}
if (!has_clear_state) {