Add the PCI ids for BDW

This is from the kernel driver.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

diff --git a/src/intel_driver.h b/src/intel_driver.h
index 8f44274..77ac815 100644 (file)
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -246,6 +246,26 @@ struct intel_region
 #define PCI_CHIP_BAYTRAIL_M_4           0x0157
 #define PCI_CHIP_BAYTRAIL_D             0x0155
 
+#define PCI_CHIP_BROADWELL_M_GT1_1      0x1606
+#define PCI_CHIP_BROADWELL_M_GT2_1      0x1616
+#define PCI_CHIP_BROADWELL_M_GT2PLUS_1  0x1626
+
+#define PCI_CHIP_BROADWELL_M_GT1_2      0x160B
+#define PCI_CHIP_BROADWELL_M_GT2_2      0x161B
+#define PCI_CHIP_BROADWELL_M_GT2PLUS_2  0x162B
+
+#define PCI_CHIP_BROADWELL_M_GT1_3      0x160E
+#define PCI_CHIP_BROADWELL_M_GT2_3      0x161E
+#define PCI_CHIP_BROADWELL_M_GT2PLUS_3  0x162E
+
+#define PCI_CHIP_BROADWELL_D_GT1_1      0x160A
+#define PCI_CHIP_BROADWELL_D_GT2_1      0x161A
+#define PCI_CHIP_BROADWELL_D_GT2PLUS_1  0x162A
+
+#define PCI_CHIP_BROADWELL_D_GT1_2      0x160D
+#define PCI_CHIP_BROADWELL_D_GT2_2      0x161D
+#define PCI_CHIP_BROADWELL_D_GT2PLUS_2  0x162D
+
 #define IS_G45(devid)           (devid == PCI_CHIP_IGD_E_G ||   \
                                  devid == PCI_CHIP_Q45_G ||     \
                                  devid == PCI_CHIP_G45_G ||     \
@@ -365,4 +385,27 @@ struct intel_region
 #define IS_GEN7(devid)          (IS_IVYBRIDGE(devid) || \
                                  IS_HASWELL(devid))
 
+
+#define IS_BDW_GT1(devid)       (devid == PCI_CHIP_BROADWELL_M_GT1_1 || \
+                                 devid == PCI_CHIP_BROADWELL_M_GT1_2 || \
+                                 devid == PCI_CHIP_BROADWELL_M_GT1_3 || \
+                                 devid == PCI_CHIP_BROADWELL_D_GT1_1 || \
+                                 devid == PCI_CHIP_BROADWELL_D_GT1_2)
+
+#define IS_BDW_GT2(devid)       (devid == PCI_CHIP_BROADWELL_M_GT2_1 || \
+                                 devid == PCI_CHIP_BROADWELL_M_GT2_2 || \
+                                 devid == PCI_CHIP_BROADWELL_M_GT2_3 || \
+                                 devid == PCI_CHIP_BROADWELL_D_GT2_1 || \
+                                 devid == PCI_CHIP_BROADWELL_D_GT2_2)
+
+#define IS_BDW_GT2PLUS(devid)   (devid == PCI_CHIP_BROADWELL_M_GT2PLUS_1 || \
+                                 devid == PCI_CHIP_BROADWELL_M_GT2PLUS_2 || \
+                                 devid == PCI_CHIP_BROADWELL_M_GT2PLUS_3 || \
+                                 devid == PCI_CHIP_BROADWELL_D_GT2PLUS_1 || \
+                                 devid == PCI_CHIP_BROADWELL_D_GT2PLUS_2)
+
+#define IS_GEN8(devid)          (IS_BDW_GT1(devid) ||   \
+                                 IS_BDW_GT2(devid) ||   \
+                                 IS_BDW_GT2PLUS(devid))
+
 #endif /* _INTEL_DRIVER_H_ */