dmaengine: dw-edma: Rename wr(rd)_ch_cnt to ll_wr(rd)_cnt in struct dw_edma_chip

The struct dw_edma contains wr(rd)_ch_cnt fields. The EDMA driver gets
write(read) channel number from register, then saves these into dw_edma.
The wr(rd)_ch_cnt in dw_edma_chip actually means how many link list memory
are available in ll_region_wr(rd)[EDMA_MAX_WR_CH]. Rename it to
ll_wr(rd)_cnt to indicate actual usage.

Link: https://lore.kernel.org/r/20220524152159.2370739-5-Frank.Li@nxp.com
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
index 9a4c96f..af037ec 100644 (file)
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -918,11 +918,11 @@ int dw_edma_probe(struct dw_edma_chip *chip)
 
        raw_spin_lock_init(&dw->lock);
 
-       dw->wr_ch_cnt = min_t(u16, chip->wr_ch_cnt,
+       dw->wr_ch_cnt = min_t(u16, chip->ll_wr_cnt,
                              dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE));
        dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt, EDMA_MAX_WR_CH);
 
-       dw->rd_ch_cnt = min_t(u16, chip->rd_ch_cnt,
+       dw->rd_ch_cnt = min_t(u16, chip->ll_rd_cnt,
                              dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ));
        dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt, EDMA_MAX_RD_CH);
 

diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
index 9553fb7..d6b5e24 100644 (file)
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -213,14 +213,14 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
        chip->nr_irqs = nr_irqs;
        chip->ops = &dw_edma_pcie_core_ops;
 
-       chip->wr_ch_cnt = vsec_data.wr_ch_cnt;
-       chip->rd_ch_cnt = vsec_data.rd_ch_cnt;
+       chip->ll_wr_cnt = vsec_data.wr_ch_cnt;
+       chip->ll_rd_cnt = vsec_data.rd_ch_cnt;
 
        chip->reg_base = pcim_iomap_table(pdev)[vsec_data.rg.bar];
        if (!chip->reg_base)
                return -ENOMEM;
 
-       for (i = 0; i < chip->wr_ch_cnt; i++) {
+       for (i = 0; i < chip->ll_wr_cnt; i++) {
                struct dw_edma_region *ll_region = &chip->ll_region_wr[i];
                struct dw_edma_region *dt_region = &chip->dt_region_wr[i];
                struct dw_edma_block *ll_block = &vsec_data.ll_wr[i];
@@ -245,7 +245,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
                dt_region->sz = dt_block->sz;
        }
 
-       for (i = 0; i < chip->rd_ch_cnt; i++) {
+       for (i = 0; i < chip->ll_rd_cnt; i++) {
                struct dw_edma_region *ll_region = &chip->ll_region_rd[i];
                struct dw_edma_region *dt_region = &chip->dt_region_rd[i];
                struct dw_edma_block *ll_block = &vsec_data.ll_rd[i];
@@ -285,7 +285,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
                chip->reg_base);
 
 
-       for (i = 0; i < chip->wr_ch_cnt; i++) {
+       for (i = 0; i < chip->ll_wr_cnt; i++) {
                pci_dbg(pdev, "L. List:\tWRITE CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n",
                        i, vsec_data.ll_wr[i].bar,
                        vsec_data.ll_wr[i].off, chip->ll_region_wr[i].sz,
@@ -297,7 +297,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
                        chip->dt_region_wr[i].vaddr, &chip->dt_region_wr[i].paddr);
        }
 
-       for (i = 0; i < chip->rd_ch_cnt; i++) {
+       for (i = 0; i < chip->ll_rd_cnt; i++) {
                pci_dbg(pdev, "L. List:\tREAD CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n",
                        i, vsec_data.ll_rd[i].bar,
                        vsec_data.ll_rd[i].off, chip->ll_region_rd[i].sz,

diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h
index df9ba3e..fdbbeda 100644 (file)
--- a/include/linux/dma/edma.h
+++ b/include/linux/dma/edma.h
@@ -40,8 +40,8 @@ enum dw_edma_map_format {
  * @nr_irqs:            total number of DMA IRQs
  * @ops                         DMA channel to IRQ number mapping
  * @reg_base            DMA register base address
- * @wr_ch_cnt           DMA write channel number
- * @rd_ch_cnt           DMA read channel number
+ * @ll_wr_cnt           DMA write link list count
+ * @ll_rd_cnt           DMA read link list count
  * @rg_region           DMA register region
  * @ll_region_wr        DMA descriptor link list memory for write channel
  * @ll_region_rd        DMA descriptor link list memory for read channel
@@ -58,8 +58,8 @@ struct dw_edma_chip {
 
        void __iomem            *reg_base;
 
-       u16                     wr_ch_cnt;
-       u16                     rd_ch_cnt;
+       u16                     ll_wr_cnt;
+       u16                     ll_rd_cnt;
        /* link list address */
        struct dw_edma_region   ll_region_wr[EDMA_MAX_WR_CH];
        struct dw_edma_region   ll_region_rd[EDMA_MAX_RD_CH];