Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d3b2454..424f8ef 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,72 @@
+2022-06-02  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+
+       Backported from master:
+       2022-05-13  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+                   Manolis Tsamis  <manolis.tsamis@vrull.eu>
+
+       * config/riscv/riscv.h (CLZ_DEFINED_VALUE_AT_ZERO): Implement.
+       (CTZ_DEFINED_VALUE_AT_ZERO): Same.
+       * doc/sourcebuild.texi: add documentation for RISC-V specific
+       test target keywords
+
+2022-06-02  Richard Biener  <rguenther@suse.de>
+
+       Backported from master:
+       2022-06-01  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/105786
+       * tree-loop-distribution.cc
+       (loop_distribution::transform_reduction_loop): Only do strlen
+       replacement for integer type reductions.
+
+2022-06-02  Richard Biener  <rguenther@suse.de>
+
+       Backported from master:
+       2022-05-27  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/105726
+       * gimple-ssa-warn-restrict.cc (builtin_memref::set_base_and_offset):
+       Constrain array-of-flexarray case more.
+
+2022-06-02  Richard Biener  <rguenther@suse.de>
+
+       Backported from master:
+       2022-05-24  Richard Biener  <rguenther@suse.de>
+
+       PR middle-end/105711
+       * expmed.cc (extract_bit_field_as_subreg): Add op0_mode parameter
+       and use it.
+       (extract_bit_field_1): Pass down the mode of op0 to
+       extract_bit_field_as_subreg.
+
+2022-06-02  Martin Sebor  <msebor@redhat.com>
+
+       Backported from master:
+       2022-05-24  Martin Sebor  <msebor@redhat.com>
+                   Richard Biener  <rguenther@suse.de>
+
+       PR middle-end/105604
+       * gimple-ssa-sprintf.cc (set_aggregate_size_and_offset): Add comments.
+       (get_origin_and_offset_r): Remove null handling.  Handle variable array
+       sizes.
+       (get_origin_and_offset): Handle null argument here.  Simplify.
+       (alias_offset): Update comment.
+       * pointer-query.cc (field_at_offset): Update comment.  Handle members
+       of variable-length types.
+
+2022-06-02  Vineet Gupta  <vineetg@rivosinc.com>
+
+       Backported from master:
+       2022-05-24  Vineet Gupta  <vineetg@rivosinc.com>
+
+       * config/riscv/riscv.cc: (struct riscv_tune_param): Add
+         fmv_cost.
+       (rocket_tune_info): Add default fmv_cost 8.
+       (sifive_7_tune_info): Ditto.
+       (thead_c906_tune_info): Ditto.
+       (optimize_size_tune_info): Ditto.
+       (riscv_register_move_cost): Use fmv_cost for int<->fp moves.
+
 2022-05-30  Martin Jambor  <mjambor@suse.cz>
 
        Backported from master:

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 42757d4..d6a6827 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20220602
+20220604

diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 952817d..dc76471 100644 (file)
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,15 @@
+2022-06-03  Jason Merrill  <jason@redhat.com>
+
+       PR c++/105761
+       * decl.cc (duplicate_decls): Don't copy DECL_TEMPLATE_INFO
+       from a hidden friend.
+
+2022-06-02  Jason Merrill  <jason@redhat.com>
+
+       PR c++/105795
+       * constexpr.cc (cxx_eval_bare_aggregate): Always call
+       init_subob_ctx.
+
 2022-06-01  Jason Merrill  <jason@redhat.com>
 
        PR c++/105734

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f44588f..c05dc8c 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,68 @@
+2022-06-03  Jason Merrill  <jason@redhat.com>
+
+       PR c++/105761
+       * g++.dg/cpp1y/auto-fn64.C: New test.
+
+2022-06-02  Jason Merrill  <jason@redhat.com>
+
+       PR c++/105795
+       * g++.dg/cpp1z/constexpr-aggr-base1.C: New test.
+
+2022-06-02  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+
+       Backported from master:
+       2022-05-13  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+                   Manolis Tsamis  <manolis.tsamis@vrull.eu>
+
+       * gcc.dg/pr90838.c: Add additional flags (dg-additional-options)
+         when compiling for riscv64 and subsume gcc.target/aarch64/pr90838.c
+         and gcc.target/i386/pr95863-2.c.
+       * gcc.target/aarch64/pr90838.c: Removed.
+       * gcc.target/i386/pr95863-2.c: Removed.
+       * lib/target-supports.exp: Recognize RV32 or RV64 via XLEN
+
+2022-06-02  Richard Biener  <rguenther@suse.de>
+
+       Backported from master:
+       2022-06-01  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/105786
+       * gcc.dg/torture/pr105786.c: New testcase.
+
+2022-06-02  Richard Biener  <rguenther@suse.de>
+
+       Backported from master:
+       2022-05-27  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/105726
+       * g++.dg/warn/Warray-bounds-27.C: New testcase.
+
+2022-06-02  Richard Biener  <rguenther@suse.de>
+
+       Backported from master:
+       2022-05-24  Richard Biener  <rguenther@suse.de>
+
+       PR middle-end/105711
+       * gcc.target/i386/pr105711.c: New testcase.
+
+2022-06-02  Martin Sebor  <msebor@redhat.com>
+
+       Backported from master:
+       2022-05-24  Martin Sebor  <msebor@redhat.com>
+                   Richard Biener  <rguenther@suse.de>
+
+       PR middle-end/105604
+       * gcc.dg/Wrestrict-24.c: New test.
+       * gcc.dg/Wrestrict-25.c: New test.
+       * gcc.dg/Wrestrict-26.c: New test.
+
+2022-06-02  Vineet Gupta  <vineetg@rivosinc.com>
+
+       Backported from master:
+       2022-05-24  Vineet Gupta  <vineetg@rivosinc.com>
+
+       * gcc.target/riscv/pr105666.c: New test.
+
 2022-06-01  Jason Merrill  <jason@redhat.com>
 
        PR c++/105734