drm/amd/display: add dsclk to pipe bw struct

This will allow us to program dscclk to required value

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 05c6152..afdfe3b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2048,7 +2048,7 @@ void update_dchubp_dpp(
                        dc->res_pool->dccg->funcs->update_dpp_dto(
                                        dc->res_pool->dccg,
                                        dpp->inst,
-                                       pipe_ctx->plane_res.bw.calc.dppclk_khz);
+                                       pipe_ctx->plane_res.bw.dppclk_khz);
                else
                        dc->res_pool->clk_mgr->clks.dppclk_khz = should_divided_by_2 ?
                                                dc->res_pool->clk_mgr->clks.dispclk_khz / 2 :

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index b168a5e..b019a5e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -180,13 +180,8 @@ struct resource_pool {
        const struct resource_caps *res_cap;
 };
 
-struct dcn_fe_clocks {
-       int dppclk_khz;
-};
-
 struct dcn_fe_bandwidth {
-       struct dcn_fe_clocks calc;
-       struct dcn_fe_clocks cur;
+       int dppclk_khz;
 };
 
 struct stream_resource {