drm/i915/dp: Tweak auxch clock divider for PCH

Matches the advice in the Sandybridge documentation.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index db3b461..add8719 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -378,7 +378,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
                else
                        aux_clock_divider = 225; /* eDP input clock at 450Mhz */
        } else if (HAS_PCH_SPLIT(dev))
-               aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */
+               aux_clock_divider = 63; /* IRL input clock fixed at 125Mhz */
        else
                aux_clock_divider = intel_hrawclk(dev) / 2;