*/
if (buf->b.is_user_ptr)
usage |= PIPE_MAP_PERSISTENT;
+ if (usage & PIPE_MAP_ONCE)
+ usage |= RADEON_MAP_TEMPORARY;
/* See if the buffer range being mapped has never been initialized,
* in which case it can be mapped unsynchronized. */
if (transfer->usage & PIPE_MAP_WRITE && !(transfer->usage & PIPE_MAP_FLUSH_EXPLICIT))
si_buffer_do_flush_region(ctx, transfer, &transfer->box);
+ if (transfer->usage & (PIPE_MAP_ONCE | RADEON_MAP_TEMPORARY) &&
+ !stransfer->staging)
+ sctx->ws->buffer_unmap(si_resource(stransfer->b.b.resource)->buf);
+
si_resource_reference(&stransfer->staging, NULL);
assert(stransfer->b.staging == NULL); /* for threaded context only */
pipe_resource_reference(&transfer->resource, NULL);
PIPE_MAP_STENCIL_ONLY = 1 << 17,
/**
+ * Mapping will be used only once (never remapped).
+ */
+ PIPE_MAP_ONCE = 1 << 18,
+
+ /**
* This and higher bits are reserved for private use by drivers. Drivers
* should use this as (PIPE_MAP_DRV_PRV << i).
*/
/* Mapping a buffer is allowed from any thread. */
#define MESA_MAP_THREAD_SAFE_BIT 0x8000
+/* This buffer will only be mapped/unmapped once */
+#define MESA_MAP_ONCE 0x10000
+
/**
* Device driver function table.
flags |= PIPE_MAP_DONTBLOCK;
if (access & MESA_MAP_THREAD_SAFE_BIT)
flags |= PIPE_MAP_THREAD_SAFE;
+ if (access & MESA_MAP_ONCE)
+ flags |= PIPE_MAP_ONCE;
return flags;
}
const GLbitfield access = (GL_MAP_WRITE_BIT |
GL_MAP_INVALIDATE_RANGE_BIT |
GL_MAP_UNSYNCHRONIZED_BIT |
- GL_MAP_FLUSH_EXPLICIT_BIT);
+ GL_MAP_FLUSH_EXPLICIT_BIT |
+ MESA_MAP_ONCE);
assert(vertex_store->bufferobj);
assert(!vertex_store->buffer_map); /* the buffer should not be mapped */