i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
interrupt-parent = <&gic>;
};
+ edacmc: memory-controller@3d400000 {
+ compatible = "snps,ddrc-3.80a";
+ reg = <0x3d400000 0x400000>;
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
ddr-pmu@3d800000 {
compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu";
reg = <0x3d800000 0x400000>;