#size-cells = <2>;
ranges;
- clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
- <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+ clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+ <&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
- <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
+ <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
<&gcc GCC_SYS_NOC_USB_AXI_CLK>;
- clock-names = "core", "iface", "bus_aggr", "utmi", "sleep",
+ clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
"noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
#size-cells = <2>;
ranges;
- clocks = <&gcc GCC_USB30_SEC_MASTER_CLK>,
- <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
+ clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
+ <&gcc GCC_USB30_SEC_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
- <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_SEC_SLEEP_CLK>,
+ <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
<&gcc GCC_SYS_NOC_USB_AXI_CLK>;
- clock-names = "core", "iface", "bus_aggr", "utmi", "sleep",
+ clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
"noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,