};
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
-static void convert_serdes_mux(int type, int need_reset);
-
-void cpld_show(void)
+static void cpld_show(void)
{
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
}
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
+static void convert_serdes_mux(int type, int need_reset)
+{
+ char current_serdes;
+ struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+ current_serdes = cpld_data->serdes_mux;
+
+ switch (type) {
+ case LANEB_SATA:
+ current_serdes &= ~MASK_LANE_B;
+ break;
+ case LANEB_SGMII1:
+ current_serdes |= (MASK_LANE_B | MASK_SGMII | MASK_LANE_C);
+ break;
+ case LANEC_SGMII1:
+ current_serdes &= ~(MASK_LANE_B | MASK_SGMII | MASK_LANE_C);
+ break;
+ case LANED_SGMII2:
+ current_serdes |= MASK_LANE_D;
+ break;
+ case LANEC_PCIEX1:
+ current_serdes |= MASK_LANE_C;
+ break;
+ case (LANED_PCIEX2 | LANEC_PCIEX1):
+ current_serdes |= MASK_LANE_C;
+ current_serdes &= ~MASK_LANE_D;
+ break;
+ default:
+ printf("CPLD serdes MUX: unsupported MUX type 0x%x\n", type);
+ return;
+ }
+
+ cpld_data->soft_mux_on |= CPLD_SET_MUX_SERDES;
+ cpld_data->serdes_mux = current_serdes;
+
+ if (need_reset == 1) {
+ printf("Reset board to enable configuration\n");
+ cpld_data->system_rst = CONFIG_RESET;
+ }
+}
+
int config_serdes_mux(void)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
}
-#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
+#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) \
+ && !defined(CONFIG_SPL_BUILD)
static void convert_flash_bank(char bank)
{
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
);
-static void convert_serdes_mux(int type, int need_reset)
-{
- char current_serdes;
- struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
-
- current_serdes = cpld_data->serdes_mux;
-
- switch (type) {
- case LANEB_SATA:
- current_serdes &= ~MASK_LANE_B;
- break;
- case LANEB_SGMII1:
- current_serdes |= (MASK_LANE_B | MASK_SGMII | MASK_LANE_C);
- break;
- case LANEC_SGMII1:
- current_serdes &= ~(MASK_LANE_B | MASK_SGMII | MASK_LANE_C);
- break;
- case LANED_SGMII2:
- current_serdes |= MASK_LANE_D;
- break;
- case LANEC_PCIEX1:
- current_serdes |= MASK_LANE_C;
- break;
- case (LANED_PCIEX2 | LANEC_PCIEX1):
- current_serdes |= MASK_LANE_C;
- current_serdes &= ~MASK_LANE_D;
- break;
- default:
- printf("CPLD serdes MUX: unsupported MUX type 0x%x\n", type);
- return;
- }
-
- cpld_data->soft_mux_on |= CPLD_SET_MUX_SERDES;
- cpld_data->serdes_mux = current_serdes;
-
- if (need_reset == 1) {
- printf("Reset board to enable configuration\n");
- cpld_data->system_rst = CONFIG_RESET;
- }
-}
-
-void print_serdes_mux(void)
+static void print_serdes_mux(void)
{
char current_serdes;
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);