[SystemZ] Ensure -mno-vx disables any use of vector features

When passing the -vector feature to LLVM (or equivalently the
-mno-vx command line argument to clang), the intent is that
generated code must not use any vector features (in particular,
no vector registers must be used).

However, there are some cases where we still could generate
such uses; these are all related to some of the additional
vector features (like +vector-enhancements-1).  Since none
of those features are actually usable with -vector, just make
sure we disable them all if -vector is given.

diff --git a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
index 68e0b7a..dbd16ab 100644 (file)
--- a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -39,6 +39,14 @@ SystemZSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
   if (HasSoftFloat)
     HasVector = false;
 
+  // -mno-vx implicitly disables all vector-related features.
+  if (!HasVector) {
+    HasVectorEnhancements1 = false;
+    HasVectorEnhancements2 = false;
+    HasVectorPackedDecimal = false;
+    HasVectorPackedDecimalEnhancement = false;
+  }
+
   return *this;
 }
 

diff --git a/llvm/test/CodeGen/SystemZ/no-vx.ll b/llvm/test/CodeGen/SystemZ/no-vx.ll
new file mode 100644 (file)
index 0000000..a590739
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/no-vx.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -mtriple=s390x-linux-gnu -o - | FileCheck %s
+
+; This test verifies that passing the "-vector" feature disables *any*
+; use of vector instructions, even if +vector-enhancements-1 if given.
+
+; Function Attrs: noinline nounwind optnone
+define dso_local signext i32 @foo(fp128* %0, fp128* %1) #0 {
+; CHECK-LABEL: @foo
+; CHECK-NOT: vl
+; CHECK-NOT: vst
+; CHECK: br %r14
+entry:
+  %arg1.addr = alloca fp128, align 8
+  %arg2.addr = alloca fp128, align 8
+  %indirect-arg-temp = alloca fp128, align 8
+  %indirect-arg-temp1 = alloca fp128, align 8
+  %arg1 = load fp128, fp128* %0, align 8
+  %arg2 = load fp128, fp128* %1, align 8
+  store fp128 %arg1, fp128* %arg1.addr, align 8
+  store fp128 %arg2, fp128* %arg2.addr, align 8
+  %2 = load fp128, fp128* %arg1.addr, align 8
+  %3 = load fp128, fp128* %arg2.addr, align 8
+  store fp128 %2, fp128* %indirect-arg-temp, align 8
+  store fp128 %3, fp128* %indirect-arg-temp1, align 8
+  %call = call signext i32 @bar(i32 signext 2, fp128* %indirect-arg-temp, fp128* %indirect-arg-temp1)
+  ret i32 %call
+}
+
+declare dso_local signext i32 @bar(i32 signext, fp128*, fp128*) #1
+
+attributes #0 = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="z14" "target-features"="+transactional-execution,+vector-enhancements-1,-vector" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="z14" "target-features"="+transactional-execution,+vector-enhancements-1,-vector" "unsafe-fp-math"="false" "use-soft-float"="false" }
+