static bool probed; /* Has PAMU been probed? */
+struct iommu_device pamu_iommu; /* IOMMU core code handle */
+
/*
* Table for matching compatible strings, for device tree
* guts node, for QorIQ SOCs.
if (ret)
goto error_genpool;
+ ret = iommu_device_sysfs_add(&pamu_iommu, dev, NULL, "iommu0");
+ if (ret)
+ goto error_genpool;
+
+ iommu_device_set_ops(&pamu_iommu, &fsl_pamu_ops);
+
+ ret = iommu_device_register(&pamu_iommu);
+ if (ret) {
+ dev_err(dev, "Can't register iommu device\n");
+ goto error_sysfs;
+ }
+
pamubypenr = in_be32(&guts_regs->pamubypenr);
for (pamu_reg_off = 0, pamu_counter = 0x80000000; pamu_reg_off < size;
return 0;
+error_sysfs:
+ iommu_device_sysfs_remove(&pamu_iommu);
+
error_genpool:
gen_pool_destroy(spaace_pool);
#define EOE_WWSAOL 0x1e /* Write with stash allocate only and lock */
#define EOE_VALID 0x80
+extern const struct iommu_ops fsl_pamu_ops;
+extern struct iommu_device pamu_iommu; /* IOMMU core code handle */
+
/* Function prototypes */
int pamu_domain_init(void);
int pamu_enable_liodn(int liodn);
iommu_group_put(group);
+ iommu_device_link(&pamu_iommu, dev);
+
return 0;
}
static void fsl_pamu_remove_device(struct device *dev)
{
+ iommu_device_unlink(&pamu_iommu, dev);
iommu_group_remove_device(dev);
}
return dma_domain->win_cnt;
}
-static const struct iommu_ops fsl_pamu_ops = {
+const struct iommu_ops fsl_pamu_ops = {
.capable = fsl_pamu_capable,
.domain_alloc = fsl_pamu_domain_alloc,
.domain_free = fsl_pamu_domain_free,
#include "fsl_pamu.h"
+const struct iommu_ops fsl_pamu_ops;
+
struct dma_window {
phys_addr_t paddr;
u64 size;