mmc: cqhci: add CQHCI_SSC1 register CBC field mask
authorSowjanya Komatineni <skomatineni@nvidia.com>
Sun, 24 Mar 2019 04:45:25 +0000 (21:45 -0700)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 15 Apr 2019 09:55:54 +0000 (11:55 +0200)
This patch adds define for CBC field mask of the register
CQHCI_SSC1.

Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/cqhci.h

index 928ec49..1e8e01d 100644 (file)
@@ -88,6 +88,7 @@
 
 /* send status config 1 */
 #define CQHCI_SSC1                     0x40
+#define CQHCI_SSC1_CBC_MASK            GENMASK(19, 16)
 
 /* send status config 2 */
 #define CQHCI_SSC2                     0x44