CHIPSET(0x56b3, dg2_g12, "DG2", "Intel(R) Graphics")
CHIPSET(0x56c0, dg2_g10, "ATS-M", "Intel(R) Data Center GPU Flex Series 170 Graphics")
CHIPSET(0x56c1, dg2_g11, "ATS-M", "Intel(R) Data Center GPU Flex Series 140 Graphics")
+
+/* CHIPSET(0x7d40, mtl_m, "MTL", "Intel(R) Graphics") */
+/* CHIPSET(0x7d45, mtl_p, "MTL", "Intel(R) Graphics") */
+/* CHIPSET(0x7d55, mtl_p, "MTL", "Intel(R) Graphics") */
+/* CHIPSET(0x7d60, mtl_m, "MTL", "Intel(R) Graphics") */
+/* CHIPSET(0x7dd5, mtl_p, "MTL", "Intel(R) Graphics") */
{ "sg1", 0x4907 },
{ "rpl", 0xa780 },
{ "dg2", 0x5690 },
+ { "mtl", 0x7d60 },
};
/**
.platform = INTEL_PLATFORM_DG2_G12,
};
+#define MTL_FEATURES \
+ /* (Sub)slice info comes from the kernel topology info */ \
+ XEHP_FEATURES(0, 1, 0), \
+ .num_subslices = dual_subslices(1), \
+ .has_local_mem = false, \
+ .apply_hwconfig = true, \
+ .has_64bit_float = true, \
+ .has_integer_dword_mul = false, \
+ .has_coarse_pixel_primitive_and_cb = true, \
+ .has_mesh_shading = true, \
+ .has_ray_tracing = true
+
+UNUSED static const struct intel_device_info intel_device_info_mtl_m = {
+ MTL_FEATURES,
+ .platform = INTEL_PLATFORM_MTL_M,
+};
+
+UNUSED static const struct intel_device_info intel_device_info_mtl_p = {
+ MTL_FEATURES,
+ .platform = INTEL_PLATFORM_MTL_P,
+};
+
static void
reset_masks(struct intel_device_info *devinfo)
{