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serial: fsl_lpuart: don't modify arbitrary data on lpuart32
author
Michael Walle
<michael@walle.cc>
Wed, 12 May 2021 14:12:47 +0000
(16:12 +0200)
committer
Greg Kroah-Hartman
<gregkh@linuxfoundation.org>
Wed, 14 Jul 2021 14:56:33 +0000
(16:56 +0200)
[ Upstream commit
ccf08fd1204bcb5311cc10aea037c71c6e74720a
]
lpuart_rx_dma_startup() is used for both the 8 bit and the 32 bit
version of the LPUART. Modify the UARTCR only for the 8 bit version.
Fixes:
f4eef224a09f
("serial: fsl_lpuart: add sysrq support when using dma")
Signed-off-by: Michael Walle <michael@walle.cc>
Link:
https://lore.kernel.org/r/20210512141255.18277-2-michael@walle.cc
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/tty/serial/fsl_lpuart.c
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diff --git
a/drivers/tty/serial/fsl_lpuart.c
b/drivers/tty/serial/fsl_lpuart.c
index
bd047e1
..
6b8e638
100644
(file)
--- a/
drivers/tty/serial/fsl_lpuart.c
+++ b/
drivers/tty/serial/fsl_lpuart.c
@@
-1625,7
+1625,7
@@
static void lpuart_rx_dma_startup(struct lpuart_port *sport)
sport->lpuart_dma_rx_use = true;
rx_dma_timer_init(sport);
- if (sport->port.has_sysrq) {
+ if (sport->port.has_sysrq
&& !lpuart_is_32(sport)
) {
cr3 = readb(sport->port.membase + UARTCR3);
cr3 |= UARTCR3_FEIE;
writeb(cr3, sport->port.membase + UARTCR3);