r600: Update scratch buffer late

For some reason the setup that comes after the scratch buffer
setup calls clobber the PS output configuration. Emitting the
scratch buffer setup as last action before the actual draw commands
seems to fix this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19804>

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index d03fcd2..be03117 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -2020,13 +2020,6 @@ static bool r600_update_derived_state(struct r600_context *rctx)
                r600_update_db_shader_control(rctx);
        }
 
-       /* For each shader stage that needs to spill, set up buffer for MEM_SCRATCH */
-       if (rctx->b.gfx_level >= EVERGREEN) {
-               evergreen_setup_scratch_buffers(rctx);
-       } else {
-               r600_setup_scratch_buffers(rctx);
-       }
-
        /* on R600 we stuff masks + txq info into one constant buffer */
        /* on evergreen we only need a txq info one */
        if (rctx->ps_shader) {
@@ -2406,6 +2399,13 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
                rctx->last_primitive_type = info->mode;
        }
 
+   /* For each shader stage that needs to spill, set up buffer for MEM_SCRATCH */
+       if (rctx->b.gfx_level >= EVERGREEN) {
+               evergreen_setup_scratch_buffers(rctx);
+       } else {
+               r600_setup_scratch_buffers(rctx);
+       }
+
        /* Draw packets. */
        if (likely(!indirect)) {
                radeon_emit(cs, PKT3(PKT3_NUM_INSTANCES, 0, 0));