Merge branch 'master' of git://git.denx.de/u-boot-net

diff --git a/.travis.yml b/.travis.yml
index 59e615a..49a7fa9 100644 (file)
--- a/.travis.yml
+++ b/.travis.yml
@@ -463,6 +463,13 @@ matrix:
           QEMU_TARGET="arm-softmmu"
           TEST_PY_ID="--id qemu"
           BUILDMAN="^zynq_zc702$"
+    - name: "test/py xilinx_versal_virt"
+      env:
+        - TEST_PY_BD="xilinx_versal_virt"
+          TEST_PY_TEST_SPEC="not sleep"
+          QEMU_TARGET="aarch64-softmmu"
+          TEST_PY_ID="--id qemu"
+          BUILDMAN="^xilinx_versal_virt$"
     - name: "test/py xtfpga"
       env:
         - TEST_PY_BD="xtfpga"

diff --git a/MAINTAINERS b/MAINTAINERS
index 1cb092e..ecac867 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -362,7 +362,7 @@ ARM ZYNQMP
 M:     Michal Simek <michal.simek@xilinx.com>
 S:     Maintained
 T:     git git://git.denx.de/u-boot-microblaze.git
-F:     arch/arm/cpu/armv8/zynqmp/
+F:     arch/arm/mach-zynqmp/
 F:     drivers/clk/clk_zynqmp.c
 F:     drivers/fpga/zynqpl.c
 F:     drivers/gpio/zynq_gpio.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d6b1629..2298e6e 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -886,6 +886,8 @@ config ARCH_VERSAL
        select ARM64
        select CLK
        select DM
+       select DM_ETH if NET
+       select DM_MMC if MMC
        select DM_SERIAL
        select OF_CONTROL
 
@@ -929,6 +931,8 @@ config ARCH_ZYNQMP_R5
        select CLK
        select CPU_V7R
        select DM
+       select DM_ETH if NET
+       select DM_MMC if MMC
        select DM_SERIAL
        select OF_CONTROL
        imply CMD_DM
@@ -939,7 +943,11 @@ config ARCH_ZYNQMP
        select ARM64
        select CLK
        select DM
+       select DM_ETH if NET
+       select DM_MMC if MMC
        select DM_SERIAL
+       select DM_SPI if SPI
+       select DM_SPI_FLASH if DM_SPI
        select DM_USB if USB
        select OF_CONTROL
        select SPL_BOARD_INIT if SPL
@@ -1495,14 +1503,14 @@ source "arch/arm/cpu/armv7/vf610/Kconfig"
 
 source "arch/arm/mach-zynq/Kconfig"
 
+source "arch/arm/mach-zynqmp/Kconfig"
+
 source "arch/arm/mach-versal/Kconfig"
 
 source "arch/arm/mach-zynqmp-r5/Kconfig"
 
 source "arch/arm/cpu/armv7/Kconfig"
 
-source "arch/arm/cpu/armv8/zynqmp/Kconfig"
-
 source "arch/arm/cpu/armv8/Kconfig"
 
 source "arch/arm/mach-imx/Kconfig"

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 87d9d4b..8173025 100644 (file)
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -81,6 +81,7 @@ machine-$(CONFIG_ARCH_STM32MP)                += stm32mp
 machine-$(CONFIG_TEGRA)                        += tegra
 machine-$(CONFIG_ARCH_UNIPHIER)                += uniphier
 machine-$(CONFIG_ARCH_ZYNQ)            += zynq
+machine-$(CONFIG_ARCH_ZYNQMP)          += zynqmp
 machine-$(CONFIG_ARCH_VERSAL)          += versal
 machine-$(CONFIG_ARCH_ZYNQMP_R5)       += zynqmp-r5
 

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 52c8daa..4c4b13c 100644 (file)
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_a
 
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
 obj-$(CONFIG_S32V234) += s32v234/
-obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/
 obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
 obj-$(CONFIG_ARMV8_PSCI) += psci.o
 obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o

diff --git a/arch/arm/dts/zynq-topic-miamiplus.dts b/arch/arm/dts/zynq-topic-miamiplus.dts
index c0ccea9..df53886 100644 (file)
--- a/arch/arm/dts/zynq-topic-miamiplus.dts
+++ b/arch/arm/dts/zynq-topic-miamiplus.dts
@@ -11,6 +11,15 @@
        compatible = "topic,miamiplus", "xlnx,zynq-7000";
 };
 
+/* The miamiplus contains a speedgrade-2 device and runs at 800MHz */
+&cpu0 {
+       operating-points = <
+               /* kHz    uV */
+               800000  1000000
+               400000  1000000
+       >;
+};
+
 &qspi {
        is-dual = <1>;
 };

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 80ac9a6..831d6e1 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -700,7 +700,7 @@
                        /* dma-coherent; */
                };
 
-               sdhci0: sdhci@ff160000 {
+               sdhci0: mmc@ff160000 {
                        u-boot,dm-pre-reloc;
                        compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
                        status = "disabled";
@@ -715,7 +715,7 @@
                        nvmem-cell-names = "soc_revision";
                };
 
-               sdhci1: sdhci@ff170000 {
+               sdhci1: mmc@ff170000 {
                        u-boot,dm-pre-reloc;
                        compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
                        status = "disabled";

diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index f8b93fe..a75ba1f 100644 (file)
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -4,7 +4,7 @@
  *
  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
  *     Lokesh Vutla <lokeshvutla@ti.com>
- * (This file is derived from arch/arm/cpu/armv8/zynqmp/cpu.c)
+ * (This file is derived from arch/arm/mach-zynqmp/cpu.c)
  *
  */
 

diff --git a/arch/arm/mach-tegra/arm64-mmu.c b/arch/arm/mach-tegra/arm64-mmu.c
index 702fde1..d45b1fa 100644 (file)
--- a/arch/arm/mach-tegra/arm64-mmu.c
+++ b/arch/arm/mach-tegra/arm64-mmu.c
@@ -2,7 +2,7 @@
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
  * Michal Simek <michal.simek@xilinx.com>
- * (This file derived from arch/arm/cpu/armv8/zynqmp/cpu.c)
+ * (This file derived from arch/arm/mach-zynqmp/cpu.c)
  *
  * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
  */

diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index a599ed6..21dfebf 100644 (file)
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -55,7 +55,7 @@ config SYS_CONFIG_NAME
          will be used for board configuration.
 
 config SYS_MALLOC_F_LEN
-       default 0x600
+       default 0x800
 
 config SYS_MALLOC_LEN
        default 0x1400000

diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h
index 3ff3c10..58b6f95 100644 (file)
--- a/arch/arm/mach-zynq/include/mach/hardware.h
+++ b/arch/arm/mach-zynq/include/mach/hardware.h
@@ -9,8 +9,6 @@
 #define ZYNQ_SYS_CTRL_BASEADDR         0xF8000000
 #define ZYNQ_DEV_CFG_APB_BASEADDR      0xF8007000
 #define ZYNQ_SCU_BASEADDR              0xF8F00000
-#define ZYNQ_GEM_BASEADDR0             0xE000B000
-#define ZYNQ_GEM_BASEADDR1             0xE000C000
 #define ZYNQ_I2C_BASEADDR0             0xE0004000
 #define ZYNQ_I2C_BASEADDR1             0xE0005000
 #define ZYNQ_QSPI_BASEADDR             0xE000D000

diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig
similarity index 100%
rename from arch/arm/cpu/armv8/zynqmp/Kconfig
rename to arch/arm/mach-zynqmp/Kconfig

diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile
similarity index 100%
rename from arch/arm/cpu/armv8/zynqmp/Makefile
rename to arch/arm/mach-zynqmp/Makefile

diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/mach-zynqmp/clk.c
similarity index 100%
rename from arch/arm/cpu/armv8/zynqmp/clk.c
rename to arch/arm/mach-zynqmp/clk.c

diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
similarity index 98%
rename from arch/arm/cpu/armv8/zynqmp/cpu.c
rename to arch/arm/mach-zynqmp/cpu.c
index 4ee8e3f..5ef1a52 100644 (file)
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -179,8 +179,7 @@ int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2,
        return regs.regs[0];
 }
 
-#if defined(CONFIG_CLK_ZYNQMP)
-unsigned int zynqmp_pmufw_version(void)
+unsigned int  __maybe_unused zynqmp_pmufw_version(void)
 {
        int ret;
        u32 ret_payload[PAYLOAD_ARG_CNT];
@@ -202,7 +201,6 @@ unsigned int zynqmp_pmufw_version(void)
 
        return pm_api_version;
 }
-#endif
 
 static int zynqmp_mmio_rawwrite(const u32 address,
                      const u32 mask,

diff --git a/arch/arm/cpu/armv8/zynqmp/handoff.c b/arch/arm/mach-zynqmp/handoff.c
similarity index 100%
rename from arch/arm/cpu/armv8/zynqmp/handoff.c
rename to arch/arm/mach-zynqmp/handoff.c

diff --git a/arch/arm/include/asm/arch-zynqmp/clk.h b/arch/arm/mach-zynqmp/include/mach/clk.h
similarity index 100%
rename from arch/arm/include/asm/arch-zynqmp/clk.h
rename to arch/arm/mach-zynqmp/include/mach/clk.h

diff --git a/arch/arm/include/asm/arch-zynqmp/gpio.h b/arch/arm/mach-zynqmp/include/mach/gpio.h
similarity index 100%
rename from arch/arm/include/asm/arch-zynqmp/gpio.h
rename to arch/arm/mach-zynqmp/include/mach/gpio.h

diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h
similarity index 96%
rename from arch/arm/include/asm/arch-zynqmp/hardware.h
rename to arch/arm/mach-zynqmp/include/mach/hardware.h
index 8a505ed..efb4bba 100644 (file)
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -7,11 +7,6 @@
 #ifndef _ASM_ARCH_HARDWARE_H
 #define _ASM_ARCH_HARDWARE_H
 
-#define ZYNQ_GEM_BASEADDR0     0xFF0B0000
-#define ZYNQ_GEM_BASEADDR1     0xFF0C0000
-#define ZYNQ_GEM_BASEADDR2     0xFF0D0000
-#define ZYNQ_GEM_BASEADDR3     0xFF0E0000
-
 #define ZYNQ_I2C_BASEADDR0     0xFF020000
 #define ZYNQ_I2C_BASEADDR1     0xFF030000
 

diff --git a/arch/arm/include/asm/arch-zynqmp/psu_init_gpl.h b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
similarity index 100%
rename from arch/arm/include/asm/arch-zynqmp/psu_init_gpl.h
rename to arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h

diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
similarity index 100%
rename from arch/arm/include/asm/arch-zynqmp/sys_proto.h
rename to arch/arm/mach-zynqmp/include/mach/sys_proto.h

diff --git a/arch/arm/cpu/armv8/zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c
similarity index 100%
rename from arch/arm/cpu/armv8/zynqmp/mp.c
rename to arch/arm/mach-zynqmp/mp.c

diff --git a/arch/arm/cpu/armv8/zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c
similarity index 100%
rename from arch/arm/cpu/armv8/zynqmp/psu_spl_init.c
rename to arch/arm/mach-zynqmp/psu_spl_init.c

diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
similarity index 100%
rename from arch/arm/cpu/armv8/zynqmp/spl.c
rename to arch/arm/mach-zynqmp/spl.c

diff --git a/arch/powerpc/cpu/mpc85xx/config.mk b/arch/powerpc/cpu/mpc85xx/config.mk
index 44d69ad..7a1d81c 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/config.mk
+++ b/arch/powerpc/cpu/mpc85xx/config.mk
@@ -4,6 +4,7 @@
 # Xianghua Xiao, X.Xiao@motorola.com
 
 PLATFORM_CPPFLAGS += -Wa,-me500 -msoft-float -mno-string
+PLATFORM_RELFLAGS += -msingle-pic-base -fno-jump-tables
 
 # -mspe=yes is needed to have -mno-spe accepted by a buggy GCC;
 # see "[PATCH,rs6000] make -mno-spe work as expected" on

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 932aa08..dbc7053 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1216,6 +1216,9 @@ _start_cont:
        mr      r1,r3           /* Transfer to SP(r1) */
 
        GET_GOT
+       /* Needed for -msingle-pic-base */
+       bl      _GLOBAL_OFFSET_TABLE_@local-4
+       mflr    r30
 
        /* Pass our potential ePAPR device tree pointer to cpu_init_early_f */
        mr      r3, r24

diff --git a/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c b/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c
index c1cc1df..d90a350 100644 (file)
--- a/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c
+++ b/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c
@@ -8,8 +8,8 @@
 
 static unsigned long ps7_pll_init_data_3_0[] = {
        EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU, 0x0000DF0DU),
-       EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U, 0x000FA220U),
-       EMIT_MASKWRITE(0XF8000100, 0x0007F000U, 0x00028000U),
+       EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U, 0x000FA240U),
+       EMIT_MASKWRITE(0XF8000100, 0x0007F000U, 0x00030000U),
        EMIT_MASKWRITE(0XF8000100, 0x00000010U, 0x00000010U),
        EMIT_MASKWRITE(0XF8000100, 0x00000001U, 0x00000001U),
        EMIT_MASKWRITE(0XF8000100, 0x00000001U, 0x00000000U),
@@ -24,8 +24,8 @@ static unsigned long ps7_pll_init_data_3_0[] = {
        EMIT_MASKPOLL(0XF800010C, 0x00000002U),
        EMIT_MASKWRITE(0XF8000104, 0x00000010U, 0x00000000U),
        EMIT_MASKWRITE(0XF8000124, 0xFFF00003U, 0x0C200003U),
-       EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U, 0x00113220U),
-       EMIT_MASKWRITE(0XF8000108, 0x0007F000U, 0x00024000U),
+       EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U, 0x001452C0U),
+       EMIT_MASKWRITE(0XF8000108, 0x0007F000U, 0x0001E000U),
        EMIT_MASKWRITE(0XF8000108, 0x00000010U, 0x00000010U),
        EMIT_MASKWRITE(0XF8000108, 0x00000001U, 0x00000001U),
        EMIT_MASKWRITE(0XF8000108, 0x00000001U, 0x00000000U),
@@ -37,20 +37,18 @@ static unsigned long ps7_pll_init_data_3_0[] = {
 
 static unsigned long ps7_clock_init_data_3_0[] = {
        EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU, 0x0000DF0DU),
-       EMIT_MASKWRITE(0XF8000128, 0x03F03F01U, 0x00302301U),
-       EMIT_MASKWRITE(0XF8000138, 0x00000011U, 0x00000011U),
+       EMIT_MASKWRITE(0XF8000128, 0x03F03F01U, 0x00700F01U),
+       EMIT_MASKWRITE(0XF8000138, 0x00000011U, 0x00000001U),
        EMIT_MASKWRITE(0XF800013C, 0x00000011U, 0x00000011U),
-       EMIT_MASKWRITE(0XF8000140, 0x03F03F71U, 0x00100141U),
-       EMIT_MASKWRITE(0XF8000144, 0x03F03F71U, 0x00100141U),
-       EMIT_MASKWRITE(0XF8000148, 0x00003F31U, 0x00000C01U),
-       EMIT_MASKWRITE(0XF800014C, 0x00003F31U, 0x00000601U),
-       EMIT_MASKWRITE(0XF8000150, 0x00003F33U, 0x00001803U),
-       EMIT_MASKWRITE(0XF8000154, 0x00003F33U, 0x00000C03U),
-       EMIT_MASKWRITE(0XF8000158, 0x00003F33U, 0x00000601U),
-       EMIT_MASKWRITE(0XF8000168, 0x00003F31U, 0x00000601U),
-       EMIT_MASKWRITE(0XF8000170, 0x03F03F30U, 0x00100C00U),
-       EMIT_MASKWRITE(0XF8000180, 0x03F03F30U, 0x00100C00U),
-       EMIT_MASKWRITE(0XF8000190, 0x03F03F30U, 0x00100600U),
+       EMIT_MASKWRITE(0XF8000140, 0x03F03F71U, 0x00100801U),
+       EMIT_MASKWRITE(0XF800014C, 0x00003F31U, 0x00000501U),
+       EMIT_MASKWRITE(0XF8000150, 0x00003F33U, 0x00000A01U),
+       EMIT_MASKWRITE(0XF8000154, 0x00003F33U, 0x00000A03U),
+       EMIT_MASKWRITE(0XF8000158, 0x00003F33U, 0x00000501U),
+       EMIT_MASKWRITE(0XF8000168, 0x00003F31U, 0x00000501U),
+       EMIT_MASKWRITE(0XF8000170, 0x03F03F30U, 0x00200500U),
+       EMIT_MASKWRITE(0XF8000180, 0x03F03F30U, 0x00100700U),
+       EMIT_MASKWRITE(0XF8000190, 0x03F03F30U, 0x00100500U),
        EMIT_MASKWRITE(0XF80001A0, 0x03F03F30U, 0x00101800U),
        EMIT_MASKWRITE(0XF80001C4, 0x00000001U, 0x00000001U),
        EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU, 0x01FC4C4DU),
@@ -88,7 +86,7 @@ static unsigned long ps7_ddr_init_data_3_0[] = {
        EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU, 0x00466111U),
        EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU, 0x00032222U),
        EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU, 0x10200802U),
-       EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU, 0x0690CB73U),
+       EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU, 0x0690CB52U),
        EMIT_MASKWRITE(0XF80060AC, 0x000001FFU, 0x000001FEU),
        EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU),
        EMIT_MASKWRITE(0XF80060B4, 0x00000200U, 0x00000200U),

diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index 3e039cc..321670d 100644 (file)
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -174,11 +174,11 @@ static char zynqmp_help_text[] =
        "zynqmp mmio_write address mask value - write value after masking to\n"
        "                                       address\n"
 #ifdef CONFIG_DEFINE_TCM_OCM_MMAP
-       "zynqmp tcminit  mode - Initialize the TCM with zeros. TCM needs to be\n"
-       "                       initialized before accessing to avoid ECC\n"
-       "                       errors. mode specifies in which mode TCM has\n"
-       "                       to be initialized. Supported modes will be\n"
-       "                       lock(0)/split(1)\n"
+       "zynqmp tcminit mode - Initialize the TCM with zeros. TCM needs to be\n"
+       "                      initialized before accessing to avoid ECC\n"
+       "                      errors. mode specifies in which mode TCM has\n"
+       "                      to be initialized. Supported modes will be\n"
+       "                      lock(0)/split(1)\n"
 #endif
        ;
 #endif

diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 13c404b..41e88b0 100644 (file)
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -489,6 +489,7 @@ void reset_cpu(ulong addr)
 {
 }
 
+#if defined(CONFIG_BOARD_LATE_INIT)
 static const struct {
        u32 bit;
        const char *name;
@@ -587,6 +588,8 @@ int board_late_init(void)
        case SD_MODE:
                puts("SD_MODE\n");
                if (uclass_get_device_by_name(UCLASS_MMC,
+                                             "mmc@ff160000", &dev) &&
+                   uclass_get_device_by_name(UCLASS_MMC,
                                              "sdhci@ff160000", &dev)) {
                        puts("Boot from SD0 but without SD0 enabled!\n");
                        return -1;
@@ -603,6 +606,8 @@ int board_late_init(void)
        case SD_MODE1:
                puts("SD_MODE1\n");
                if (uclass_get_device_by_name(UCLASS_MMC,
+                                             "mmc@ff170000", &dev) &&
+                   uclass_get_device_by_name(UCLASS_MMC,
                                              "sdhci@ff170000", &dev)) {
                        puts("Boot from SD1 but without SD1 enabled!\n");
                        return -1;
@@ -655,6 +660,7 @@ int board_late_init(void)
 
        return 0;
 }
+#endif
 
 int checkboard(void)
 {

diff --git a/configs/avnet_ultra96_rev1_defconfig b/configs/avnet_ultra96_rev1_defconfig
index 5b5af16..896de78 100644 (file)
--- a/configs/avnet_ultra96_rev1_defconfig
+++ b/configs/avnet_ultra96_rev1_defconfig
@@ -39,7 +39,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="avnet-ultra96-rev1"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
@@ -55,24 +54,21 @@ CONFIG_ZYNQ_I2C1=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_DM_ETH=y
 # CONFIG_NETDEVICES is not set
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_SPI=y
-CONFIG_DM_SPI=y
 CONFIG_ZYNQ_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index c4bca06..75139d9 100644 (file)
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -31,7 +31,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub"
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y

diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 70d07ac..927ce9a 100644 (file)
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -34,9 +34,8 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
-CONFIG_SYS_I2C_ZYNQ=y
-CONFIG_ZYNQ_I2C0=y
-CONFIG_ZYNQ_I2C1=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y

diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 387f4ca..e4d52f6 100644 (file)
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -34,9 +34,8 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
-CONFIG_SYS_I2C_ZYNQ=y
-CONFIG_ZYNQ_I2C0=y
-CONFIG_ZYNQ_I2C1=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y

diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index d820fff..f742838 100644 (file)
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -33,9 +33,8 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
-CONFIG_SYS_I2C_ZYNQ=y
-CONFIG_ZYNQ_I2C0=y
-CONFIG_ZYNQ_I2C1=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y

diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index 668c313..57e497c 100644 (file)
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -19,7 +19,9 @@ CONFIG_SYS_PROMPT="Versal> "
 CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DM=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_DHCP=y
@@ -42,7 +44,8 @@ CONFIG_OF_BOARD=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DM_GPIO=y
-CONFIG_DM_MMC=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_DM_SPI_FLASH=y
@@ -55,7 +58,6 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y

diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig
index 9cdc944..a49fb84 100644 (file)
--- a/configs/xilinx_zynqmp_mini_emmc0_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig
@@ -52,7 +52,6 @@ CONFIG_SPL_DM=y
 # CONFIG_DM_WARN is not set
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 # CONFIG_EFI_LOADER is not set

diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig
index 74ea3a8..658ea6d 100644 (file)
--- a/configs/xilinx_zynqmp_mini_emmc1_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig
@@ -52,7 +52,6 @@ CONFIG_SPL_DM=y
 # CONFIG_DM_WARN is not set
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 # CONFIG_EFI_LOADER is not set

diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig
index d037da7..3ec435e 100644 (file)
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -52,15 +52,14 @@ CONFIG_SPL_DM=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_MMC is not set
-CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI=y
-CONFIG_DM_SPI=y
 CONFIG_ZYNQMP_GQSPI=y
 # CONFIG_EFI_LOADER is not set

diff --git a/configs/xilinx_zynqmp_zc1232_revA_defconfig b/configs/xilinx_zynqmp_zc1232_revA_defconfig
index 7521fc4..983e61e 100644 (file)
--- a/configs/xilinx_zynqmp_zc1232_revA_defconfig
+++ b/configs/xilinx_zynqmp_zc1232_revA_defconfig
@@ -23,22 +23,23 @@ CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_SF=y
 # CONFIG_CMD_NET is not set
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1232-revA"
 CONFIG_SPL_DM=y
-# CONFIG_BLK is not set
 CONFIG_CLK_ZYNQMP=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
+# CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -47,4 +48,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/xilinx_zynqmp_zc1254_revA_defconfig b/configs/xilinx_zynqmp_zc1254_revA_defconfig
index e0822b9..10d3489 100644 (file)
--- a/configs/xilinx_zynqmp_zc1254_revA_defconfig
+++ b/configs/xilinx_zynqmp_zc1254_revA_defconfig
@@ -23,22 +23,23 @@ CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_SF=y
 # CONFIG_CMD_NET is not set
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1254-revA"
 CONFIG_SPL_DM=y
-# CONFIG_BLK is not set
 CONFIG_CLK_ZYNQMP=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
+# CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -47,4 +48,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/xilinx_zynqmp_zc1275_revA_defconfig b/configs/xilinx_zynqmp_zc1275_revA_defconfig
index 3afed69..9ac3dd8 100644 (file)
--- a/configs/xilinx_zynqmp_zc1275_revA_defconfig
+++ b/configs/xilinx_zynqmp_zc1275_revA_defconfig
@@ -23,22 +23,23 @@ CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_SF=y
 # CONFIG_CMD_NET is not set
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revA"
 CONFIG_SPL_DM=y
-# CONFIG_BLK is not set
 CONFIG_CLK_ZYNQMP=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
+# CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -47,4 +48,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/xilinx_zynqmp_zc1275_revB_defconfig b/configs/xilinx_zynqmp_zc1275_revB_defconfig
index 7e31b11..c154b15 100644 (file)
--- a/configs/xilinx_zynqmp_zc1275_revB_defconfig
+++ b/configs/xilinx_zynqmp_zc1275_revB_defconfig
@@ -24,30 +24,37 @@ CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 # CONFIG_CMD_NET is not set
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revB"
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_CLK_ZYNQMP=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_XILINX_GMII2RGMII=y
+CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index efd933f..f2caac7 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -28,17 +28,18 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -56,12 +57,13 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -73,13 +75,14 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index f9e5605..bbbbb8e 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -38,7 +39,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
@@ -57,6 +57,7 @@ CONFIG_DM_MMC=y
 CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
 CONFIG_NAND_ARASAN=y
+CONFIG_SYS_NAND_MAX_CHIPS=2
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SST=y
@@ -66,13 +67,13 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

diff --git a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
index 4d94a21..d91d511 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -35,7 +36,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm017-dc3"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
@@ -50,7 +50,6 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_MTD_DEVICE=y
@@ -62,7 +61,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -71,6 +69,7 @@ CONFIG_DM_SCSI=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
index a0bbc0f..10e0fca 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
@@ -23,14 +23,15 @@ CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -43,11 +44,12 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -59,10 +61,11 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y

diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
index 0625d19..d14d6c4 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_TFTPPUT=y
@@ -31,7 +32,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -44,7 +44,6 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_PHY_MARVELL=y
@@ -53,11 +52,11 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/xilinx_zynqmp_zcu100_revC_defconfig b/configs/xilinx_zynqmp_zcu100_revC_defconfig
index 53bca78..ca96b9e 100644 (file)
--- a/configs/xilinx_zynqmp_zcu100_revC_defconfig
+++ b/configs/xilinx_zynqmp_zcu100_revC_defconfig
@@ -39,7 +39,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
@@ -55,24 +54,21 @@ CONFIG_ZYNQ_I2C1=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_DM_ETH=y
 # CONFIG_NETDEVICES is not set
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_SPI=y
-CONFIG_DM_SPI=y
 CONFIG_ZYNQ_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
index 905d467..30d3147 100644 (file)
--- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xff000000
 CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
@@ -42,7 +44,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-rev1.0"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -68,14 +69,14 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
-CONFIG_DM_MMC=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -87,7 +88,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -97,7 +97,6 @@ CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_SPI=y
-CONFIG_DM_SPI=y
 CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig
index 5e4bbf8..bada5e1 100644 (file)
--- a/configs/xilinx_zynqmp_zcu102_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xff000000
 CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
@@ -29,6 +31,7 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -41,7 +44,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revA"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -67,12 +69,12 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -84,7 +86,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -94,7 +95,6 @@ CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_SPI=y
-CONFIG_DM_SPI=y
 CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index 29aa076..3c4ac01 100644 (file)
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xff000000
 CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
@@ -29,6 +31,7 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -41,7 +44,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -67,12 +69,12 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -84,7 +86,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -94,7 +95,6 @@ CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_SPI=y
-CONFIG_DM_SPI=y
 CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

diff --git a/configs/xilinx_zynqmp_zcu104_revA_defconfig b/configs/xilinx_zynqmp_zcu104_revA_defconfig
index 8fe30f9..90fd431 100644 (file)
--- a/configs/xilinx_zynqmp_zcu104_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu104_revA_defconfig
@@ -26,17 +26,18 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revA"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -53,12 +54,12 @@ CONFIG_CMD_PCA953X=y
 CONFIG_SYS_I2C_ZYNQ=y
 CONFIG_ZYNQ_I2C1=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -70,7 +71,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -79,6 +79,8 @@ CONFIG_DM_SCSI=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

diff --git a/configs/xilinx_zynqmp_zcu104_revC_defconfig b/configs/xilinx_zynqmp_zcu104_revC_defconfig
index a3d8ea0..eb30e23 100644 (file)
--- a/configs/xilinx_zynqmp_zcu104_revC_defconfig
+++ b/configs/xilinx_zynqmp_zcu104_revC_defconfig
@@ -26,17 +26,18 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revC"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -54,12 +55,12 @@ CONFIG_SYS_I2C_ZYNQ=y
 CONFIG_ZYNQ_I2C1=y
 CONFIG_MISC=y
 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -71,7 +72,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -80,6 +80,8 @@ CONFIG_DM_SCSI=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

diff --git a/configs/xilinx_zynqmp_zcu106_revA_defconfig b/configs/xilinx_zynqmp_zcu106_revA_defconfig
index 6a659f0..9e8eb5f 100644 (file)
--- a/configs/xilinx_zynqmp_zcu106_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu106_revA_defconfig
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xff000000
 CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
@@ -27,17 +29,18 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu106-revA"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -62,12 +65,12 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SF_DUAL_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -79,7 +82,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -88,6 +90,8 @@ CONFIG_DM_SCSI=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

diff --git a/configs/xilinx_zynqmp_zcu111_revA_defconfig b/configs/xilinx_zynqmp_zcu111_revA_defconfig
index fc54438..b8e9604 100644 (file)
--- a/configs/xilinx_zynqmp_zcu111_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu111_revA_defconfig
@@ -26,16 +26,17 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu111-revA"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -56,11 +57,11 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -72,7 +73,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
@@ -81,6 +81,8 @@ CONFIG_DM_SCSI=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

diff --git a/configs/zynq_dlc20_rev1_0_defconfig b/configs/zynq_dlc20_rev1_0_defconfig
index e39bd13..7ead192 100644 (file)
--- a/configs/zynq_dlc20_rev1_0_defconfig
+++ b/configs/zynq_dlc20_rev1_0_defconfig
@@ -35,7 +35,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-dlc20-rev1.0"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y

diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index 46b6300..9e44e82 100644 (file)
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="zynq_zybo"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
 CONFIG_SPL=y
@@ -18,7 +17,6 @@ CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_PROMPT="Zynq> "
 CONFIG_CMD_THOR_DOWNLOAD=y
-CONFIG_CMD_EEPROM=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
@@ -26,7 +24,6 @@ CONFIG_CMD_FPGA_LOADFS=y
 CONFIG_CMD_FPGA_LOADMK=y
 CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -43,9 +40,6 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
-CONFIG_SYS_I2C_ZYNQ=y
-CONFIG_ZYNQ_I2C0=y
-CONFIG_ZYNQ_I2C1=y
 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y

diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig
index 7985ad6..d729ca3 100644 (file)
--- a/configs/zynq_zybo_z7_defconfig
+++ b/configs/zynq_zybo_z7_defconfig
@@ -24,7 +24,6 @@ CONFIG_CMD_FPGA_LOADFS=y
 CONFIG_CMD_FPGA_LOADMK=y
 CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -41,9 +40,6 @@ CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
-CONFIG_SYS_I2C_ZYNQ=y
-CONFIG_ZYNQ_I2C0=y
-CONFIG_ZYNQ_I2C1=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index c095d5e..22bfdd8 100644 (file)
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -233,7 +233,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
                                 (u32)bsize, 0, ret_payload);
 
        if (ret)
-               debug("PL FPGA LOAD fail\n");
+               puts("PL FPGA LOAD fail\n");
 
        return ret;
 }

diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index f2c4b20..4330d28 100644 (file)
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -419,7 +419,7 @@ static int cdns_i2c_ofdata_to_platdata(struct udevice *dev)
        struct clk clk;
        int ret;
 
-       i2c_bus->regs = (struct cdns_i2c_regs *)devfdt_get_addr(dev);
+       i2c_bus->regs = (struct cdns_i2c_regs *)dev_read_addr(dev);
        if (!i2c_bus->regs)
                return -ENOMEM;
 

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index b05334d..0802378 100644 (file)
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -28,7 +28,6 @@ struct arasan_sdhci_priv {
        u8 deviceid;
        u8 bank;
        u8 no_1p8;
-       bool pwrseq;
 };
 
 #if defined(CONFIG_ARCH_ZYNQMP)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 6d46660..7f76e5e 100644 (file)
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -299,6 +299,13 @@ config SYS_NAND_BUSWIDTH_16BIT
            not available while configuring controller. So a static CONFIG_NAND_xx
            is needed to know the device's bus-width in advance.
 
+config SYS_NAND_MAX_CHIPS
+       int "NAND max chips"
+       default 1
+       depends on NAND_ARASAN
+       help
+         The maximum number of NAND chips per device to be supported.
+
 if SPL
 
 config SYS_NAND_U_BOOT_LOCATIONS

diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index dc531cc..2cd3f64 100644 (file)
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -90,6 +90,8 @@ struct arasan_nand_command_format {
 #define ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT       16
 #define ARASAN_NAND_MEM_ADDR2_PAGE_MASK                0xFF
 #define ARASAN_NAND_MEM_ADDR2_CS_MASK          0xC0000000
+#define ARASAN_NAND_MEM_ADDR2_CS0_MASK         (0x3 << 30)
+#define ARASAN_NAND_MEM_ADDR2_CS1_MASK         (0x1 << 30)
 #define ARASAN_NAND_MEM_ADDR2_BCH_MASK         0xE000000
 #define ARASAN_NAND_MEM_ADDR2_BCH_SHIFT                25
 
@@ -261,6 +263,16 @@ static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
 static void arasan_nand_select_chip(struct mtd_info *mtd, int chip)
 {
+       u32 reg_val;
+
+       reg_val = readl(&arasan_nand_base->memadr_reg2);
+       if (chip == 0) {
+               reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS0_MASK;
+               writel(reg_val, &arasan_nand_base->memadr_reg2);
+       } else if (chip == 1) {
+               reg_val |= ARASAN_NAND_MEM_ADDR2_CS1_MASK;
+               writel(reg_val, &arasan_nand_base->memadr_reg2);
+       }
 }
 
 static void arasan_nand_enable_ecc(void)
@@ -713,9 +725,6 @@ static int arasan_nand_send_wrcmd(struct arasan_nand_command_format *curr_cmd,
        reg_val &= ~ARASAN_NAND_MEM_ADDR2_PAGE_MASK;
        reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT);
        writel(reg_val, &arasan_nand_base->memadr_reg2);
-       reg_val = readl(&arasan_nand_base->memadr_reg2);
-       reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-       writel(reg_val, &arasan_nand_base->memadr_reg2);
 
        return 0;
 }
@@ -804,9 +813,6 @@ static int arasan_nand_erase(struct arasan_nand_command_format *curr_cmd,
        reg_val &= ~ARASAN_NAND_MEM_ADDR2_PAGE_MASK;
        reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT);
        writel(reg_val, &arasan_nand_base->memadr_reg2);
-       reg_val = readl(&arasan_nand_base->memadr_reg2);
-       reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-       writel(reg_val, &arasan_nand_base->memadr_reg2);
        writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg);
 
        while (!(readl(&arasan_nand_base->intsts_reg) &
@@ -859,10 +865,6 @@ static int arasan_nand_read_status(struct arasan_nand_command_format *curr_cmd,
        reg_val |= (1 << ARASAN_NAND_PKT_REG_PKT_CNT_SHFT) | 1;
        writel(reg_val, &arasan_nand_base->pkt_reg);
 
-       reg_val = readl(&arasan_nand_base->memadr_reg2);
-       reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-       writel(reg_val, &arasan_nand_base->memadr_reg2);
-
        writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg);
        while (!(readl(&arasan_nand_base->intsts_reg) &
                ARASAN_NAND_INT_STS_XFR_CMPLT_MASK) && timeout) {
@@ -932,9 +934,6 @@ static int arasan_nand_send_rdcmd(struct arasan_nand_command_format *curr_cmd,
        reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT);
        writel(reg_val, &arasan_nand_base->memadr_reg2);
 
-       reg_val = readl(&arasan_nand_base->memadr_reg2);
-       reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-       writel(reg_val, &arasan_nand_base->memadr_reg2);
        buf_index = 0;
 
        return 0;
@@ -1219,7 +1218,7 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)
        writel(0x0, &arasan_nand_base->pgm_reg);
 
        /* first scan to find the device and get the page size */
-       if (nand_scan_ident(mtd, 1, NULL)) {
+       if (nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL)) {
                printf("%s: nand_scan_ident failed\n", __func__);
                goto fail;
        }

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 78205a3..0c8b29d 100644 (file)
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -881,18 +881,18 @@ void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
        debug("%s connected to %s\n", dev->name, phydev->drv->name);
 }
 
+#ifdef CONFIG_PHY_FIXED
 #ifdef CONFIG_DM_ETH
-struct phy_device *phy_connect(struct mii_dev *bus, int addr,
-                              struct udevice *dev,
-                              phy_interface_t interface)
+static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
+                                           struct udevice *dev,
+                                           phy_interface_t interface)
 #else
-struct phy_device *phy_connect(struct mii_dev *bus, int addr,
-                              struct eth_device *dev,
-                              phy_interface_t interface)
+static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
+                                           struct eth_device *dev,
+                                           phy_interface_t interface)
 #endif
 {
        struct phy_device *phydev = NULL;
-#ifdef CONFIG_PHY_FIXED
        int sn;
        const char *name;
 
@@ -906,7 +906,27 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr,
                }
                sn = fdt_next_subnode(gd->fdt_blob, sn);
        }
+
+       return phydev;
+}
 #endif
+
+#ifdef CONFIG_DM_ETH
+struct phy_device *phy_connect(struct mii_dev *bus, int addr,
+                              struct udevice *dev,
+                              phy_interface_t interface)
+#else
+struct phy_device *phy_connect(struct mii_dev *bus, int addr,
+                              struct eth_device *dev,
+                              phy_interface_t interface)
+#endif
+{
+       struct phy_device *phydev = NULL;
+
+#ifdef CONFIG_PHY_FIXED
+       phydev = phy_connect_fixed(bus, dev, interface);
+#endif
+
        if (!phydev)
                phydev = phy_find_by_mask(bus, 1 << addr, interface);
 

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 9bd79b1..3bd0093 100644 (file)
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -570,11 +570,6 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, int len)
        addr &= ~(ARCH_DMA_MINALIGN - 1);
        size = roundup(len, ARCH_DMA_MINALIGN);
        flush_dcache_range(addr, addr + size);
-
-       addr = (ulong)priv->rxbuffers;
-       addr &= ~(ARCH_DMA_MINALIGN - 1);
-       size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
-       flush_dcache_range(addr, addr + size);
        barrier();
 
        /* Start transmit */
@@ -621,6 +616,9 @@ static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp)
 
        *packetp = (uchar *)(uintptr_t)addr;
 
+       invalidate_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN, ARCH_DMA_MINALIGN));
+       barrier();
+
        return frame_len;
 }
 
@@ -706,6 +704,9 @@ static int zynq_gem_probe(struct udevice *dev)
                return -ENOMEM;
 
        memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
+       u32 addr = (ulong)priv->rxbuffers;
+       flush_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, ARCH_DMA_MINALIGN));
+       barrier();
 
        /* Align bd_space to MMU_SECTION_SHIFT */
        bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 864f322..1710fed 100644 (file)
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -14,6 +14,8 @@
 # define CONFIG_CPU_FREQ_HZ    800000000
 #endif
 
+#define CONFIG_REMAKE_ELF
+
 /* Cache options */
 #define CONFIG_SYS_L2CACHE_OFF
 #ifndef CONFIG_SYS_L2CACHE_OFF

diff --git a/include/configs/zynq_zybo.h b/include/configs/zynq_zybo.h
deleted file mode 100644 (file)
index 7d00b41..0000000
--- a/include/configs/zynq_zybo.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2012 Xilinx
- * (C) Copyright 2014 Digilent Inc.
- *
- * Configuration for Zynq Development Board - ZYBO
- * See zynq-common.h for Zynq common configs
- */
-
-#ifndef __CONFIG_ZYNQ_ZYBO_H
-#define __CONFIG_ZYNQ_ZYBO_H
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_ZYNQ_GEM_EEPROM_ADDR    0x50
-
-#include <configs/zynq-common.h>
-
-#endif /* __CONFIG_ZYNQ_ZYBO_H */

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 29626e0..e5b604e 100644 (file)
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -190,7 +190,10 @@ MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE) \
        -n "$(shell cd $(srctree); readlink -f $(CONFIG_PMUFW_INIT_FILE))"
 endif
 
-spl/boot.bin: $(obj)/u-boot-spl.bin FORCE
+$(obj)/$(SPL_BIN)-align.bin: $(obj)/$(SPL_BIN).bin
+       @dd if=$< of=$@ conv=block,sync bs=4 2>/dev/null;
+
+spl/boot.bin: $(obj)/$(SPL_BIN)-align.bin FORCE
        $(call if_changed,mkimage)
 endif
 

diff --git a/tools/zynqmpbif.c b/tools/zynqmpbif.c
index 6c8f660..8c47107 100644 (file)
--- a/tools/zynqmpbif.c
+++ b/tools/zynqmpbif.c
@@ -319,16 +319,25 @@ static int bif_add_pmufw(struct bif_entry *bf, const char *data, size_t len)
 static int bif_add_part(struct bif_entry *bf, const char *data, size_t len)
 {
        size_t parthdr_offset = 0;
+       size_t len_padded = ROUND(len, 4);
+
        struct partition_header parthdr = {
-               .len_enc = cpu_to_le32(len / 4),
-               .len_unenc = cpu_to_le32(len / 4),
-               .len = cpu_to_le32(len / 4),
+               .len_enc = cpu_to_le32(len_padded / 4),
+               .len_unenc = cpu_to_le32(len_padded / 4),
+               .len = cpu_to_le32(len_padded / 4),
                .entry_point = cpu_to_le64(bf->entry),
                .load_address = cpu_to_le64(bf->load),
        };
        int r;
        uint32_t csum;
 
+       if (len < len_padded) {
+               char *newdata = malloc(len_padded);
+               memcpy(newdata, data, len);
+               memset(newdata + len, 0, len_padded - len);
+               data = newdata;
+       }
+
        if (bf->flags & (1ULL << BIF_FLAG_PMUFW_IMAGE))
                return bif_add_pmufw(bf, data, len);
 
@@ -416,8 +425,8 @@ static int bif_add_part(struct bif_entry *bf, const char *data, size_t len)
                if (!bif_output.header->image_offset)
                        bif_output.header->image_offset =
                                cpu_to_le32(bf->offset);
-               bif_output.header->image_size = cpu_to_le32(len);
-               bif_output.header->image_stored_size = cpu_to_le32(len);
+               bif_output.header->image_size = cpu_to_le32(len_padded);
+               bif_output.header->image_stored_size = cpu_to_le32(len_padded);
 
                bif_output.header->image_attributes &= ~HEADER_CPU_SELECT_MASK;
                switch (bf->dest_cpu) {