ASoC: rt711: add two jack detection modes
authorShuming Fan <shumingf@realtek.com>
Thu, 17 Jun 2021 09:08:22 +0000 (17:08 +0800)
committerMark Brown <broonie@kernel.org>
Mon, 21 Jun 2021 12:06:25 +0000 (13:06 +0100)
Some boards use different circuits for jack detection.
This patch adds two modes as below
1. JD2/2 ports/external resister 100k
2. JD2/1 port/JD voltage 1.8V

Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://lore.kernel.org/r/20210617090822.16960-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt711-sdw.h
sound/soc/codecs/rt711.c
sound/soc/codecs/rt711.h

index 43b2b98..6acf985 100644 (file)
@@ -267,7 +267,9 @@ static const struct reg_default rt711_reg_defaults[] = {
        { 0x8393, 0x00 },
        { 0x7319, 0x00 },
        { 0x8399, 0x00 },
+       { 0x752008, 0xa807 },
        { 0x752009, 0x1029 },
+       { 0x75200b, 0x7770 },
        { 0x752011, 0x007a },
        { 0x75201a, 0x8003 },
        { 0x752045, 0x5289 },
index 9f5b2dc..abaf150 100644 (file)
@@ -389,6 +389,36 @@ static void rt711_jack_init(struct rt711_priv *rt711)
                                RT711_HP_JD_FINAL_RESULT_CTL_JD12,
                                RT711_HP_JD_FINAL_RESULT_CTL_JD12);
                        break;
+               case RT711_JD2_100K:
+                       rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
+                               RT711_JD_CTL2, RT711_JD2_2PORT_100K_DECODE | RT711_JD2_1PORT_TYPE_DECODE |
+                               RT711_HP_JD_SEL_JD2 | RT711_JD1_2PORT_TYPE_100K_DECODE,
+                               RT711_JD2_2PORT_100K_DECODE_HP | RT711_JD2_1PORT_JD_HP |
+                               RT711_HP_JD_SEL_JD2 | RT711_JD1_2PORT_JD_RESERVED);
+                       rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
+                               RT711_CC_DET1,
+                               RT711_HP_JD_FINAL_RESULT_CTL_JD12,
+                               RT711_HP_JD_FINAL_RESULT_CTL_JD12);
+                       break;
+               case RT711_JD2_1P8V_1PORT:
+                       rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
+                               RT711_JD_CTL1, RT711_JD2_DIGITAL_JD_MODE_SEL,
+                               RT711_JD2_1_JD_MODE);
+                       rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
+                               RT711_JD_CTL2, RT711_JD2_1PORT_TYPE_DECODE |
+                               RT711_HP_JD_SEL_JD2,
+                               RT711_JD2_1PORT_JD_HP |
+                               RT711_HP_JD_SEL_JD2);
+                       rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
+                               RT711_JD_CTL4, RT711_JD2_PAD_PULL_UP_MASK |
+                               RT711_JD2_MODE_SEL_MASK,
+                               RT711_JD2_PAD_PULL_UP |
+                               RT711_JD2_MODE2_1P8V_1PORT);
+                       rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
+                               RT711_CC_DET1,
+                               RT711_HP_JD_FINAL_RESULT_CTL_JD12,
+                               RT711_HP_JD_FINAL_RESULT_CTL_JD12);
+                       break;
                default:
                        dev_warn(rt711->component->dev, "Wrong JD source\n");
                        break;
index ca0f581..5f2ba13 100644 (file)
@@ -52,7 +52,9 @@ struct sdw_stream_data {
 
 /* Index (NID:20h) */
 #define RT711_DAC_DC_CALI_CTL1                         0x00
+#define RT711_JD_CTL1                          0x08
 #define RT711_JD_CTL2                          0x09
+#define RT711_JD_CTL4                          0x0b
 #define RT711_CC_DET1                          0x11
 #define RT711_PARA_VERB_CTL                            0x1a
 #define RT711_COMBO_JACK_AUTO_CTL1                             0x45
@@ -171,10 +173,33 @@ struct sdw_stream_data {
 /* DAC DC offset calibration control-1 (0x00)(NID:20h) */
 #define RT711_DAC_DC_CALI_TRIGGER (0x1 << 15)
 
+/* jack detect control 1 (0x08)(NID:20h) */
+#define RT711_JD2_DIGITAL_JD_MODE_SEL (0x1 << 1)
+#define RT711_JD2_1_JD_MODE (0x0 << 1)
+#define RT711_JD2_2_JD_MODE (0x1 << 1)
+
 /* jack detect control 2 (0x09)(NID:20h) */
 #define RT711_JD2_2PORT_200K_DECODE_HP (0x1 << 13)
+#define RT711_JD2_2PORT_100K_DECODE (0x1 << 12)
+#define RT711_JD2_2PORT_100K_DECODE_HP (0x0 << 12)
 #define RT711_HP_JD_SEL_JD1 (0x0 << 1)
 #define RT711_HP_JD_SEL_JD2 (0x1 << 1)
+#define RT711_JD2_1PORT_TYPE_DECODE (0x3 << 10)
+#define RT711_JD2_1PORT_JD_LINE2 (0x0 << 10)
+#define RT711_JD2_1PORT_JD_HP (0x1 << 10)
+#define RT711_JD2_1PORT_JD_LINE1 (0x2 << 10)
+#define RT711_JD1_2PORT_TYPE_100K_DECODE (0x1 << 0)
+#define RT711_JD1_2PORT_JD_RESERVED (0x0 << 0)
+#define RT711_JD1_2PORT_JD_LINE1 (0x1 << 0)
+
+/* jack detect control 4 (0x0b)(NID:20h) */
+#define RT711_JD2_PAD_PULL_UP_MASK (0x1 << 3)
+#define RT711_JD2_PAD_NOT_PULL_UP (0x0 << 3)
+#define RT711_JD2_PAD_PULL_UP (0x1 << 3)
+#define RT711_JD2_MODE_SEL_MASK (0x3 << 0)
+#define RT711_JD2_MODE0_2PORT (0x0 << 0)
+#define RT711_JD2_MODE1_3P3V_1PORT (0x1 << 0)
+#define RT711_JD2_MODE2_1P8V_1PORT (0x2 << 0)
 
 /* CC DET1 (0x11)(NID:20h) */
 #define RT711_HP_JD_FINAL_RESULT_CTL_JD12 (0x1 << 10)
@@ -215,7 +240,9 @@ enum {
 enum rt711_jd_src {
        RT711_JD_NULL,
        RT711_JD1,
-       RT711_JD2
+       RT711_JD2,
+       RT711_JD2_100K,
+       RT711_JD2_1P8V_1PORT
 };
 
 int rt711_io_init(struct device *dev, struct sdw_slave *slave);