RegAllocGreedy: Remove redundant check for virtual registers
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 26 Mar 2022 21:25:34 +0000 (17:25 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 13 Apr 2022 19:00:18 +0000 (15:00 -0400)
The set of interfering virtual registers obviously only includes
virtual registers.

llvm/lib/CodeGen/RegAllocGreedy.cpp

index 80d796d1ad924aab8d0e0c5b67946e67b942e12d..029f05d0b50728b35a3fc13bfb4ea636d02e8e1b 100644 (file)
@@ -460,9 +460,6 @@ bool RAGreedy::canEvictInterferenceInRange(const LiveInterval &VirtReg,
       if (!Intf->overlaps(Start, End))
         continue;
 
-      // Cannot evict non virtual reg interference.
-      if (!Register::isVirtualRegister(Intf->reg()))
-        return false;
       // Never evict spill products. They cannot split or spill.
       if (ExtraInfo->getStage(*Intf) == RS_Done)
         return false;