-//===- MachineFunctionInitalizer.h - machine function initializer ---------===//
+//===- MachineFunctionInitializer.h - machine function initializer ---------===//
//
// The LLVM Compiler Infrastructure
//
// "}}" to print a literal '}'.
//
// ===Parameter Indexing===
-// `index` specifies the index of the paramter in the parameter pack to format
+// `index` specifies the index of the parameter in the parameter pack to format
// into the output. Note that it is possible to refer to the same parameter
// index multiple times in a given format string. This makes it possible to
// output the same value multiple times without passing it multiple times to the
bool HasAlignment = Record[0] & 2;
// 2nd field used to be an artificial tag, either DW_TAG_auto_variable or
// DW_TAG_arg_variable, if we have alignment flag encoded it means, that
- // this is newer version of record which doesn't have artifical tag.
+ // this is newer version of record which doesn't have artificial tag.
bool HasTag = !HasAlignment && Record.size() > 8;
DINode::DIFlags Flags = static_cast<DINode::DIFlags>(Record[7 + HasTag]);
uint32_t AlignInBits = 0;
const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg);
CrossCopy = isCrossCopy(*MRI, UseMI, DstRC, MO);
if (CrossCopy)
- DEBUG(dbgs() << "Copy accross incompatible classes: " << UseMI);
+ DEBUG(dbgs() << "Copy across incompatible classes: " << UseMI);
}
if (!CrossCopy)
///
/// A) A previous pass has created a compact branch directly.
/// B) Transforming a delay slot branch into compact branch. This case can be
-/// difficult to process as lookahead for hazards is insufficent, as
+/// difficult to process as lookahead for hazards is insufficient, as
/// backwards delay slot fillling can also produce hazards in previously
/// processed instuctions.
///
}
++OIdx;
}
- assert(StoreOperands.empty() && "Unfinished paramter store.");
+ assert(StoreOperands.empty() && "Unfinished parameter store.");
if (VTs.size() > 0)
--OIdx;
++paramCount;
} // UseVSXReg = 1
// Pattern for matching Vector HP -> Vector SP intrinsic. Defined as a
- // seperate pattern so that it can convert the input register class from
+ // separate pattern so that it can convert the input register class from
// VRRC(v8i16) to VSRC.
def : Pat<(v4f32 (int_ppc_vsx_xvcvhpsp v8i16:$A)),
(v4f32 (XVCVHPSP (COPY_TO_REGCLASS $A, VSRC)))>;
// the pseudo. The argument feeding EBX is ebx_input.
//
// The additional argument, $ebx_save, is a temporary register used to
-// save the value of RBX accross the actual instruction.
+// save the value of RBX across the actual instruction.
//
// To make sure the register assigned to $ebx_save does not interfere with
// the definition of the actual instruction, we use a definition $dst which
-// is tied to $rbx_save. That way, the live-range of $rbx_save spans accross
+// is tied to $rbx_save. That way, the live-range of $rbx_save spans across
// the instruction and we are sure we will have a valid register to restore
// the value of RBX.
let Defs = [EAX, EDX, EBX, EFLAGS], Uses = [EAX, ECX, EDX],
m_Intrinsic<Intrinsic::experimental_guard>(m_Value(NextCond)))) {
Value *CurrCond = II->getArgOperand(0);
- // Remove a guard that it is immediately preceeded by an identical guard.
+ // Remove a guard that it is immediately preceded by an identical guard.
if (CurrCond == NextCond)
return eraseInstFromFunction(*NextInst);
/// The following is an attempt to document the grammar of the format, which is
/// parsed by this function for little-endian machines. Since the format makes
/// use of BitFields, when we support big-Endian architectures, we will need to
-/// adjust not only the endianess parameter to llvm's RecordExtractor, but also
+/// adjust not only the endianness parameter to llvm's RecordExtractor, but also
/// the bit twiddling logic, which is consistent with the little-endian
/// convention that BitFields within a struct will first be packed into the
/// least significant bits the address they belong to.
Optional<PatchLocation> UnitRangeAttribute;
/// @}
- /// \brief Location attributes that need to be transfered from th
+ /// \brief Location attributes that need to be transferred from the
/// original debug_loc section to the liked one. They are stored
/// along with the PC offset that is to be applied to their
/// function's address.
/// \brief Emit a FDE into the debug_frame section. \p FDEBytes
/// contains the FDE data without the length, CIE offset and address
-/// which will be replaced with the paramter values.
+/// which will be replaced with the parameter values.
void DwarfStreamer::emitFDE(uint32_t CIEOffset, uint32_t AddrSize,
uint32_t Address, StringRef FDEBytes) {
MS->SwitchSection(MC->getObjectFileInfo()->getDwarfFrameSection());
if (LineTable.Prologue.Version != 2 ||
LineTable.Prologue.DefaultIsStmt != DWARF2_LINE_DEFAULT_IS_STMT ||
LineTable.Prologue.OpcodeBase > 13)
- reportWarning("line table paramters mismatch. Cannot emit.");
+ reportWarning("line table parameters mismatch. Cannot emit.");
else {
MCDwarfLineTableParams Params;
Params.DWARF2LineOpcodeBase = LineTable.Prologue.OpcodeBase;
// The function also tries to find a hole in the address map to fit the __DWARF
// segment of \a DwarfSegmentSize size. \a EndAddress is updated to point at the
// highest segment address.
-// When the __LINKEDIT segment is transfered, its offset and size are set resp.
+// When the __LINKEDIT segment is transferred, its offset and size are set resp.
// to \a LinkeditOffset and \a LinkeditSize.
template <typename SegmentTy>
static void transferSegmentAndSections(
break;
}
case LLVMPHI: {
- // We need to agressively set things here because of loops.
+ // We need to aggressively set things here because of loops.
VMap[Src] = Dst = LLVMBuildPhi(Builder, CloneType(Src), Name);
SmallVector<LLVMValueRef, 8> Values;
lto_initialize();
llvm::TargetOptions Options = InitTargetOptionsFromCodeGenFlags();
- // Create a local context. Ownership will be transfered to LTOModule.
+ // Create a local context. Ownership will be transferred to LTOModule.
std::unique_ptr<LLVMContext> Context = llvm::make_unique<LLVMContext>();
Context->setDiagnosticHandler(diagnosticHandler, nullptr, true);