i965: Add cfg to backend_visitor.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
index 63a3e5b..14c6898 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
+++ b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
@@ -39,10 +39,10 @@ dead_control_flow_eliminate(backend_visitor *v)
 {
    bool progress = false;
 
-   cfg_t cfg(&v->instructions);
+   v->calculate_cfg();
 
-   for (int b = 0; b < cfg.num_blocks; b++) {
-      bblock_t *block = cfg.blocks[b];
+   for (int b = 0; b < v->cfg->num_blocks; b++) {
+      bblock_t *block = v->cfg->blocks[b];
       bool found = false;
 
       /* ENDIF instructions, by definition, can only be found at the start of

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 9c76bd2..9ba3f38 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -330,7 +330,7 @@ public:
    void assign_constant_locations();
    void demote_pull_constants();
    void invalidate_live_intervals();
-   void calculate_live_intervals(const cfg_t *cfg = NULL);
+   void calculate_live_intervals();
    void calculate_register_pressure();
    bool opt_algebraic();
    bool opt_cse();

diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index d435d84..63d87f9 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -315,11 +315,10 @@ fs_visitor::opt_cse()
 {
    bool progress = false;
 
-   cfg_t cfg(&instructions);
-   calculate_live_intervals(&cfg);
+   calculate_live_intervals();
 
-   for (int b = 0; b < cfg.num_blocks; b++) {
-      bblock_t *block = cfg.blocks[b];
+   for (int b = 0; b < cfg->num_blocks; b++) {
+      bblock_t *block = cfg->blocks[b];
 
       progress = opt_cse_local(block) || progress;
    }

diff --git a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp b/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
index d41a42c..c00ec1b 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
@@ -39,15 +39,13 @@ fs_visitor::dead_code_eliminate()
 {
    bool progress = false;
 
-   cfg_t cfg(&instructions);
-
-   calculate_live_intervals(&cfg);
+   calculate_live_intervals();
 
    int num_vars = live_intervals->num_vars;
    BITSET_WORD *live = ralloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars));
 
-   for (int b = 0; b < cfg.num_blocks; b++) {
-      bblock_t *block = cfg.blocks[b];
+   for (int b = 0; b < cfg->num_blocks; b++) {
+      bblock_t *block = cfg->blocks[b];
       memcpy(live, live_intervals->bd[b].liveout,
              sizeof(BITSET_WORD) * BITSET_WORDS(num_vars));
 

diff --git a/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp b/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
index 585dc3d..57f3ce4 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
@@ -295,6 +295,8 @@ fs_visitor::invalidate_live_intervals()
 {
    ralloc_free(live_intervals);
    live_intervals = NULL;
+
+   invalidate_cfg();
 }
 
 /**
@@ -304,7 +306,7 @@ fs_visitor::invalidate_live_intervals()
  * information about whole VGRFs.
  */
 void
-fs_visitor::calculate_live_intervals(const cfg_t *cfg)
+fs_visitor::calculate_live_intervals()
 {
    if (this->live_intervals)
       return;
@@ -320,12 +322,8 @@ fs_visitor::calculate_live_intervals(const cfg_t *cfg)
       virtual_grf_end[i] = -1;
    }
 
-   if (cfg) {
-      this->live_intervals = new(mem_ctx) fs_live_variables(this, cfg);
-   } else {
-      cfg_t cfg(&instructions);
-      this->live_intervals = new(mem_ctx) fs_live_variables(this, &cfg);
-   }
+   calculate_cfg();
+   this->live_intervals = new(mem_ctx) fs_live_variables(this, cfg);
 
    /* Merge the per-component live ranges to whole VGRF live ranges. */
    for (int i = 0; i < live_intervals->num_vars; i++) {

diff --git a/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
index 1287adb..0e04d3f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
@@ -93,12 +93,10 @@ fs_visitor::opt_saturate_propagation()
 {
    bool progress = false;
 
-   cfg_t cfg(&instructions);
+   calculate_live_intervals();
 
-   calculate_live_intervals(&cfg);
-
-   for (int b = 0; b < cfg.num_blocks; b++) {
-      progress = opt_saturate_propagation_local(this, cfg.blocks[b])
+   for (int b = 0; b < cfg->num_blocks; b++) {
+      progress = opt_saturate_propagation_local(this, cfg->blocks[b])
                  || progress;
    }
 

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 318802b..072a661 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -549,7 +549,8 @@ backend_visitor::backend_visitor(struct brw_context *brw,
         (struct brw_shader *)shader_prog->_LinkedShaders[stage] : NULL),
      shader_prog(shader_prog),
      prog(prog),
-     stage_prog_data(stage_prog_data)
+     stage_prog_data(stage_prog_data),
+     cfg(NULL)
 {
 }
 
@@ -764,6 +765,20 @@ backend_visitor::dump_instructions(const char *name)
    }
 }
 
+void
+backend_visitor::calculate_cfg()
+{
+   if (this->cfg)
+      return;
+   cfg = new(mem_ctx) cfg_t(&this->instructions);
+}
+
+void
+backend_visitor::invalidate_cfg()
+{
+   ralloc_free(this->cfg);
+   this->cfg = NULL;
+}
 
 /**
  * Sets up the starting offsets for the groups of binding table entries

diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index cfaea9e..1c5f41e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -160,11 +160,16 @@ public:
     */
    exec_list instructions;
 
+   cfg_t *cfg;
+
    virtual void dump_instruction(backend_instruction *inst) = 0;
    virtual void dump_instruction(backend_instruction *inst, FILE *file) = 0;
    virtual void dump_instructions();
    virtual void dump_instructions(const char *name);
 
+   void calculate_cfg();
+   void invalidate_cfg();
+
    void assign_common_binding_table_offsets(uint32_t next_binding_table_offset);
 
    virtual void invalidate_live_intervals() = 0;

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp b/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp
index 938ae43..57eb21e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp
@@ -248,19 +248,19 @@ vec4_visitor::calculate_live_intervals()
     * The control flow-aware analysis was done at a channel level, while at
     * this point we're distilling it down to vgrfs.
     */
-   cfg_t cfg(&instructions);
-   vec4_live_variables livevars(this, &cfg);
+   calculate_cfg();
+   vec4_live_variables livevars(this, cfg);
 
-   for (int b = 0; b < cfg.num_blocks; b++) {
+   for (int b = 0; b < cfg->num_blocks; b++) {
       for (int i = 0; i < livevars.num_vars; i++) {
         if (BITSET_TEST(livevars.bd[b].livein, i)) {
-           start[i] = MIN2(start[i], cfg.blocks[b]->start_ip);
-           end[i] = MAX2(end[i], cfg.blocks[b]->start_ip);
+           start[i] = MIN2(start[i], cfg->blocks[b]->start_ip);
+           end[i] = MAX2(end[i], cfg->blocks[b]->start_ip);
         }
 
         if (BITSET_TEST(livevars.bd[b].liveout, i)) {
-           start[i] = MIN2(start[i], cfg.blocks[b]->end_ip);
-           end[i] = MAX2(end[i], cfg.blocks[b]->end_ip);
+           start[i] = MIN2(start[i], cfg->blocks[b]->end_ip);
+           end[i] = MAX2(end[i], cfg->blocks[b]->end_ip);
         }
       }
    }
@@ -272,6 +272,8 @@ void
 vec4_visitor::invalidate_live_intervals()
 {
    live_intervals_valid = false;
+
+   invalidate_cfg();
 }
 
 bool