arm64: zynqmp: Sync alignment with mainline
authorMichal Simek <michal.simek@xilinx.com>
Wed, 17 Jan 2018 15:32:33 +0000 (16:32 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 9 Apr 2018 10:14:47 +0000 (12:14 +0200)
Sync pcie and lpd_dma nodes with mainline version.
Incorrect locations are causing diff in statistics that's why
synchronizations are needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/dts/zynqmp.dtsi

index 5bdab611645166d036f649975780175d0ad86ea2..e71399f83d273501442bcf77ef6cc058ddccc70f 100644 (file)
                lpd_dma_chan1: dma@ffa80000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffa80000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 77 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x868>;
                lpd_dma_chan2: dma@ffa90000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffa90000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 78 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x869>;
                lpd_dma_chan3: dma@ffaa0000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffaa0000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 79 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x86a>;
                lpd_dma_chan4: dma@ffab0000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffab0000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 80 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x86b>;
                lpd_dma_chan5: dma@ffac0000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffac0000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 81 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x86c>;
                lpd_dma_chan6: dma@ffad0000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffad0000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 82 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x86d>;
                lpd_dma_chan7: dma@ffae0000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffae0000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 83 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x86e>;
                lpd_dma_chan8: dma@ffaf0000 {
                        status = "disabled";
                        compatible = "xlnx,zynqmp-dma-1.0";
-                       clock-names = "clk_main", "clk_apb";
                        reg = <0x0 0xffaf0000 0x0 0x1000>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 84 4>;
+                       clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x86f>;
                                     <0 116 4>,
                                     <0 115 4>, /* MSI_1 [63...32] */
                                     <0 114 4>; /* MSI_0 [31...0] */
-                       interrupt-names = "misc","dummy","intx", "msi1", "msi0";
+                       interrupt-names = "misc", "dummy", "intx",
+                                         "msi1", "msi0";
                        msi-parent = <&pcie>;
                        reg = <0x0 0xfd0e0000 0x0 0x1000>,
                              <0x0 0xfd480000 0x0 0x1000>,