Adding asserts that values are as expected for certain containment checks
authorTanner Gooding <tagoo@outlook.com>
Thu, 11 Jan 2018 22:03:39 +0000 (14:03 -0800)
committerTanner Gooding <tagoo@outlook.com>
Fri, 12 Jan 2018 16:44:38 +0000 (08:44 -0800)
src/jit/hwintrinsiccodegenxarch.cpp

index 88c260b..aa65222 100644 (file)
@@ -101,6 +101,7 @@ void CodeGen::genHWIntrinsic_R_R_RM(GenTreeHWIntrinsic* node, instruction ins)
 
     if (op2->isContained() || op2->isUsedFromSpillTemp())
     {
+        TempDsc* tmpDsc = nullptr;
         unsigned varNum = BAD_VAR_NUM;
         unsigned offset = (unsigned)-1;
 
@@ -117,6 +118,13 @@ void CodeGen::genHWIntrinsic_R_R_RM(GenTreeHWIntrinsic* node, instruction ins)
                 {
                     varNum = memBase->AsLclVarCommon()->GetLclNum();
                     offset = 0;
+
+                    // Ensure that all the GenTreeIndir values are set to their defaults.
+                    assert(memBase->gtRegNum == REG_NA);
+                    assert(!mem->HasIndex());
+                    assert(mem->Scale() == 1);
+                    assert(mem->Offset() == 0);
+
                     break;
                 }
 
@@ -162,8 +170,7 @@ void CodeGen::genHWIntrinsic_R_R_RM(GenTreeHWIntrinsic* node, instruction ins)
                     assert(op2->isUsedFromSpillTemp());
                     assert(op2->IsRegOptional());
 
-                    TempDsc* tmpDsc = getSpillTempDsc(op2);
-
+                    tmpDsc = getSpillTempDsc(op2);
                     varNum = tmpDsc->tdTempNum();
                     offset = 0;
 
@@ -173,6 +180,12 @@ void CodeGen::genHWIntrinsic_R_R_RM(GenTreeHWIntrinsic* node, instruction ins)
             }
         }
 
+        // Ensure we got a good varNum and offset.
+        // We also need to check for `tmpDsc != nullptr` since spill temp numbers
+        // are negative and start with -1, which also happens to be BAD_VAR_NUM.
+        assert((varNum != BAD_VAR_NUM) || (tmpDsc != nullptr));
+        assert(offset != (unsigned)-1);
+
         emit->emitIns_SIMD_R_R_S(ins, targetReg, op1Reg, varNum, offset, targetType);
     }
     else