iowrite8(by_bb_addr, iobase + MAC_REG_BBREGADR);
/* turn on REGR */
- MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
by_value = ioread8(iobase + MAC_REG_BBREGCTL);
iowrite8(by_data, iobase + MAC_REG_BBREGDATA);
/* turn on BBREGCTL_REGW */
- MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
by_value = ioread8(iobase + MAC_REG_BBREGCTL);
byVT3253B0_AGC4_RFMD2959[ii][1]);
iowrite32(0x23, iobase + MAC_REG_ITRTMSET);
- MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));
}
priv->abyBBVGA[0] = 0x18;
priv->abyBBVGA[1] = 0x0A;
byVT3253B0_AGC[ii][1]);
iowrite8(0x23, iobase + MAC_REG_ITRTMSET);
- MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));
priv->abyBBVGA[0] = 0x14;
priv->abyBBVGA[1] = 0x0A;
qwTSFOffset = le64_to_cpu(qwTSFOffset);
iowrite32((u32)qwTSFOffset, priv->port_offset + MAC_REG_TSFOFST);
iowrite32((u32)(qwTSFOffset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4);
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL,
- TFTCTL_TSFSYNCEN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
}
return true;
}
qwNextTBTT = le64_to_cpu(qwNextTBTT);
iowrite32((u32)qwNextTBTT, priv->port_offset + MAC_REG_NEXTTBTT);
iowrite32((u32)(qwNextTBTT >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4);
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
return true;
}
priv->radio_off = true;
pr_debug("chester power off\n");
- MACvRegBitsOn(priv->port_offset, MAC_REG_GPIOCTL0,
- LED_ACTSET); /* LED issue */
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */
}
void CARDvSafeResetTx(struct vnt_private *priv)
unsigned char data;
u32 low, high;
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
data = ioread8(iobase + MAC_REG_TFTCTL);
if (!(data & TFTCTL_TSFCNTRRD))
qwNextTBTT = le64_to_cpu(qwNextTBTT);
iowrite32((u32)qwNextTBTT, iobase + MAC_REG_NEXTTBTT);
iowrite32((u32)(qwNextTBTT >> 32), iobase + MAC_REG_NEXTTBTT + 4);
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
}
/*
qwTSF = le64_to_cpu(qwTSF);
iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT);
iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4);
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
}
}
/* clear NAV */
- MACvRegBitsOn(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);
/* TX_PE will reserve 3 us for MAX2829 A mode only,
* it is for better TX throughput
CARDvSafeResetTx(priv);
if (priv->local_id <= REV_ID_VT3253_A1)
- MACvRegBitsOn(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
/* Turn On Rx DMA */
MACvReceive0(priv->port_offset);
case NL80211_IFTYPE_ADHOC:
MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
- MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
break;
case NL80211_IFTYPE_AP:
MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
- MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
break;
default:
if (conf->enable_beacon) {
vnt_beacon_enable(priv, vif, conf);
- MACvRegBitsOn(priv->port_offset, MAC_REG_TCR,
- TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
} else {
MACvRegBitsOff(priv->port_offset, MAC_REG_TCR,
TCR_AUTOBCNTX);
/*--------------------- Export Macros ------------------------------*/
-#define MACvRegBitsOn(iobase, reg_offset, bit_mask) \
+#define vt6655_mac_reg_bits_on(iobase, reg_offset, bit_mask) \
do { \
unsigned char reg_value; \
reg_value = ioread8(iobase + reg_offset); \
}
/* Set AutoSleep */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* Set HWUTSF */
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
if (wListenInterval >= 2) {
/* clear always listen beacon */
MACvRegBitsOff(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
/* first time set listen next beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
} else {
/* always listen beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
}
/* enable power saving hw function */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_PSEN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_PSEN);
priv->bEnablePSMode = true;
priv->bPWBitOn = true;
MACvRegBitsOff(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
/* set always listen beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
priv->bEnablePSMode = false;
if (priv->wake_up_count == 1) {
/* Turn on wake up to listen next beacon */
- MACvRegBitsOn(priv->port_offset,
- MAC_REG_PSCTL, PSCTL_LNBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
wake_up = true;
}
}
iowrite16(priv->wBCNBufLen, priv->port_offset + MAC_REG_BCNDMACTL + 2);
/* Set auto Transmit on */
- MACvRegBitsOn(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
/* Poll Transmit the adapter */
iowrite8(BEACON_READY, priv->port_offset + MAC_REG_BCNDMACTL);