[NDS32] Fine-tune memory address type.

gcc/
	* config/nds32/constraints.md (U33): Fine-tune checking condition.
	* config/nds32/nds32-md-auxiliary.c (nds32_mem_format): Ditto.
	* config/nds32/nds32.h (nds32_16bit_address_type): Add
	ADDRESS_POST_MODIFY_LO_REG_IMM3U.

Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r259122

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 021c097..6e299cb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,14 @@
 2018-04-05  Shiva Chen  <shiva0217@gmail.com>
            Kito Cheng  <kito.cheng@gmail.com>
 
+       * config/nds32/constraints.md (U33): Fine-tune checking condition.
+       * config/nds32/nds32-md-auxiliary.c (nds32_mem_format): Ditto.
+       * config/nds32/nds32.h (nds32_16bit_address_type): Add
+       ADDRESS_POST_MODIFY_LO_REG_IMM3U.
+
+2018-04-05  Shiva Chen  <shiva0217@gmail.com>
+           Kito Cheng  <kito.cheng@gmail.com>
+
        * config/nds32/constraints.md (Ufe): New memory constraint.
        * config/nds32/nds32-md-auxiliary.c (nds32_mem_format,
        nds32_output_16bit_load): Consider r8 register for lwi45.fe format.

diff --git a/gcc/config/nds32/constraints.md b/gcc/config/nds32/constraints.md
index 46b925f..7cf18eb 100644 (file)
--- a/gcc/config/nds32/constraints.md
+++ b/gcc/config/nds32/constraints.md
@@ -288,7 +288,9 @@
 (define_memory_constraint "U33"
   "Memory constraint for 333 format"
   (and (match_code "mem")
-       (match_test "nds32_mem_format (op) == ADDRESS_LO_REG_IMM3U")))
+       (match_test "nds32_mem_format (op) == ADDRESS_POST_INC_LO_REG_IMM3U
+                   || nds32_mem_format (op) == ADDRESS_POST_MODIFY_LO_REG_IMM3U
+                   || nds32_mem_format (op) == ADDRESS_LO_REG_IMM3U")))
 
 (define_memory_constraint "U45"
   "Memory constraint for 45 format"

diff --git a/gcc/config/nds32/nds32-md-auxiliary.c b/gcc/config/nds32/nds32-md-auxiliary.c
index 3895899..b3673ae 100644 (file)
--- a/gcc/config/nds32/nds32-md-auxiliary.c
+++ b/gcc/config/nds32/nds32-md-auxiliary.c
@@ -891,8 +891,8 @@ nds32_mem_format (rtx op)
     {
       regno = REGNO (XEXP (XEXP (op, 1), 0));
       val = INTVAL (XEXP (XEXP (op, 1), 1));
-      if (regno < 8 && val < 32)
-       return ADDRESS_POST_INC_LO_REG_IMM3U;
+      if (regno < 8 && val > 0 && val < 32)
+       return ADDRESS_POST_MODIFY_LO_REG_IMM3U;
     }
 
   if ((GET_CODE (op) == PLUS)
@@ -903,7 +903,7 @@ nds32_mem_format (rtx op)
 
       regno = REGNO(XEXP (op, 0));
 
-      if (regno > 7
+      if (regno > 8
          && regno != SP_REGNUM
          && regno != FP_REGNUM)
        return ADDRESS_NOT_16BIT_FORMAT;
@@ -971,7 +971,11 @@ nds32_output_16bit_store (rtx *operands, int byte)
       output_asm_insn (pattern, operands);
       break;
     case ADDRESS_POST_INC_LO_REG_IMM3U:
-      snprintf (pattern, sizeof (pattern), "s%ci333.bi\t%%1, %%0", size);
+      snprintf (pattern, sizeof (pattern), "swi333.bi\t%%1, %%0, 4");
+      output_asm_insn (pattern, operands);
+      break;
+    case ADDRESS_POST_MODIFY_LO_REG_IMM3U:
+      snprintf (pattern, sizeof (pattern), "swi333.bi\t%%1, %%0");
       output_asm_insn (pattern, operands);
       break;
     case ADDRESS_FP_IMM7U:
@@ -1010,7 +1014,11 @@ nds32_output_16bit_load (rtx *operands, int byte)
       output_asm_insn (pattern, operands);
       break;
     case ADDRESS_POST_INC_LO_REG_IMM3U:
-      snprintf (pattern, sizeof (pattern), "l%ci333.bi\t%%0, %%1", size);
+      snprintf (pattern, sizeof (pattern), "lwi333.bi\t%%0, %%1, 4");
+      output_asm_insn (pattern, operands);
+      break;
+    case ADDRESS_POST_MODIFY_LO_REG_IMM3U:
+      snprintf (pattern, sizeof (pattern), "lwi333.bi\t%%0, %%1");
       output_asm_insn (pattern, operands);
       break;
     case ADDRESS_R8_IMM7U:

diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index 1f3c48c..02b99a1 100644 (file)
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -113,6 +113,8 @@ enum nds32_16bit_address_type
   ADDRESS_LO_REG_IMM3U,
   /* post_inc [lo_reg + imm3u]: 333 format address.  */
   ADDRESS_POST_INC_LO_REG_IMM3U,
+  /* post_modify [lo_reg + imm3u]: 333 format address.  */
+  ADDRESS_POST_MODIFY_LO_REG_IMM3U,
   /* [$r8 + imm7u]: r8 imply address.  */
   ADDRESS_R8_IMM7U,
   /* [$fp + imm7u]: fp imply address.  */