#if defined(TARGET_MIPS64)
} else if (address < 0x4000000000000000ULL) {
/* xuseg */
- if (UX && address < (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
+ if (UX && address <= (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
} else {
ret = TLBRET_BADADDR;
} else if (address < 0x8000000000000000ULL) {
/* xsseg */
if ((supervisor_mode || kernel_mode) &&
- SX && address < (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) {
+ SX && address <= (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
} else {
ret = TLBRET_BADADDR;
/* xkphys */
/* XXX: Assumes PABITS = 36 (correct for MIPS64R1) */
if (kernel_mode && KX &&
- (address & 0x07FFFFFFFFFFFFFFULL) < 0x0000000FFFFFFFFFULL) {
+ (address & 0x07FFFFFFFFFFFFFFULL) <= 0x0000000FFFFFFFFFULL) {
*physical = address & 0x0000000FFFFFFFFFULL;
*prot = PAGE_READ | PAGE_WRITE;
} else {
} else if (address < 0xFFFFFFFF80000000ULL) {
/* xkseg */
if (kernel_mode && KX &&
- address < (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) {
+ address <= (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
} else {
ret = TLBRET_BADADDR;