+2012-11-29 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * config/epiphany/predicates.md (addsub_operator): New predicate.
+ * config/epiphany/epiphany-sched.md (sched_use_fpu): New attribute.
+ * config/epiphany/epiphany.md (isub_i+1): New peephole2.
+ * config/epiphany/epiphany.h (get_attr_sched_use_fpu): Declare.
+
2012-11-28 Jakub Jelinek <jakub@redhat.com>
PR debug/36728
(and (eq_attr "pipe_model" "epiphany")
(eq_attr "type" "v2fp"))
"issue,issue+F0,F0")
+
+; A boolean attribute for use by peephole2 patterns that try to figure out
+; if we overcommitted the FPU.
+; This is notionally a numeric attribute to avoid dependency problems.
+(define_attr "sched_use_fpu" ""
+ (cond [(eq_attr "type" "fp,fp_int,v2fp") (const_int 1)]
+ (const_int 0)))
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
epiphany_start_function ((FILE), (NAME), (DECL))
+/* PR other/55523: gencondmd file includes / dependencies are messed up,
+ it uses peephole2 predicates without having all the necessary headers. */
+extern int get_attr_sched_use_fpu (rtx);
+
#endif /* !GCC_EPIPHANY_H */
"isub %0, %1, %2"
[(set_attr "type" "fp_int")])
+; Try to figure out if we over-committed the FPU, and if so, move
+; some insns back over to the integer pipe.
+
+; The peephole optimizer 'consumes' the insns that are explicitly
+; mentioned. We do not want the preceding insn reconsidered, but
+; we do want that for the following one, so that if we have a run
+; of five fpu users, two of them get changed. Therefore, we
+; use next_active_insn to look at the 'following' insn. That should
+; exist, because peephole2 runs after reload, and there has to be
+; a return after an fp_int insn.
+(define_peephole2
+ [(match_parallel 5 "float_operation" [(match_operand 6 "" "")])
+ (match_parallel 3 "float_operation"
+ [(set (match_operand:SI 0 "gpr_operand" "")
+ (match_operator:SI 4 "addsub_operator"
+ [(match_operand:SI 1 "gpr_operand" "")
+ (match_operand:SI 2 "gpr_operand" "")]))
+ (clobber (reg:CC_FP CCFP_REGNUM))])]
+ "get_attr_sched_use_fpu (peep2_next_insn (0))
+ && peep2_regno_dead_p (2, CC_REGNUM)
+ && get_attr_sched_use_fpu (next_active_insn (peep2_next_insn (1)))"
+ [(match_dup 5)
+ (parallel [(set (match_dup 0) (match_dup 4))
+ (clobber (reg:CC CC_REGNUM))])]
+)
+
(define_expand "mulsi3"
[(parallel
[(set (match_operand:SI 0 "gpr_operand" "")