2018-04-16 Alan Modra <amodra@gmail.com>
+ * Makefile.am: Remove i370 support.
+ * archures.c: Likewise.
+ * config.bfd: Likewise.
+ * configure.ac: Likewise.
+ * targets.c: Likewise.
+ * cpu-i370.c: Delete.
+ * elf32-i370.c: Delete.
+ * Makefile.in: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * configure: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
+2018-04-16 Alan Modra <amodra@gmail.com>
+
* Makefile.am: Remove h8500 support.
* archures.c: Likewise.
* coffcode.h: Likewise.
cpu-ft32.lo \
cpu-h8300.lo \
cpu-hppa.lo \
- cpu-i370.lo \
cpu-i386.lo \
cpu-iamcu.lo \
cpu-l1om.lo \
cpu-ft32.c \
cpu-h8300.c \
cpu-hppa.c \
- cpu-i370.c \
cpu-i386.c \
cpu-iamcu.c \
cpu-l1om.c \
elf32-gen.lo \
elf32-h8300.lo \
elf32-hppa.lo \
- elf32-i370.lo \
elf32-i386.lo \
elfxx-x86.lo \
elf32-ip2k.lo \
elf32-gen.c \
elf32-h8300.c \
elf32-hppa.c \
- elf32-i370.c \
elf32-i386.c \
elfxx-x86.c \
elf32-ip2k.c \
cpu-ft32.lo \
cpu-h8300.lo \
cpu-hppa.lo \
- cpu-i370.lo \
cpu-i386.lo \
cpu-iamcu.lo \
cpu-l1om.lo \
cpu-ft32.c \
cpu-h8300.c \
cpu-hppa.c \
- cpu-i370.c \
cpu-i386.c \
cpu-iamcu.c \
cpu-l1om.c \
elf32-gen.lo \
elf32-h8300.lo \
elf32-hppa.lo \
- elf32-i370.lo \
elf32-i386.lo \
elfxx-x86.lo \
elf32-ip2k.lo \
elf32-gen.c \
elf32-h8300.c \
elf32-hppa.c \
- elf32-i370.c \
elf32-i386.c \
elfxx-x86.c \
elf32-ip2k.c \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ft32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-h8300.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-hppa.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-i370.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-i386.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ia64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iamcu.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-gen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-h8300.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-hppa.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-i370.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-i386.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-ia64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-ip2k.Plo@am__quote@
.#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu)
.#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax)
. bfd_arch_we32k, {* AT&T WE32xxx. *}
-. bfd_arch_i370, {* IBM 360/370 Mainframes. *}
. bfd_arch_romp, {* IBM ROMP PC/RT. *}
. bfd_arch_convex, {* Convex. *}
. bfd_arch_m88k, {* Motorola 88xxx. *}
extern const bfd_arch_info_type bfd_frv_arch;
extern const bfd_arch_info_type bfd_h8300_arch;
extern const bfd_arch_info_type bfd_hppa_arch;
-extern const bfd_arch_info_type bfd_i370_arch;
extern const bfd_arch_info_type bfd_i386_arch;
extern const bfd_arch_info_type bfd_iamcu_arch;
extern const bfd_arch_info_type bfd_ia64_arch;
&bfd_frv_arch,
&bfd_h8300_arch,
&bfd_hppa_arch,
- &bfd_i370_arch,
&bfd_i386_arch,
&bfd_iamcu_arch,
&bfd_ia64_arch,
#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu)
#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax)
bfd_arch_we32k, /* AT&T WE32xxx. */
- bfd_arch_i370, /* IBM 360/370 Mainframes. */
bfd_arch_romp, /* IBM ROMP PC/RT. */
bfd_arch_convex, /* Convex. */
bfd_arch_m88k, /* Motorola 88xxx. */
vax-*-bsd* | vax-*-ultrix* | \
we32k-*-* | \
w65-*-* | \
- i370-* | \
sh5*-*-* | sh64*-*-* | \
null)
if test "x$enable_obsolete" != xyes; then
h8300*-*-coff | \
h8500*-*-coff | \
hppa*-*-rtems* | \
+ i370-* | \
i860-*-* | \
i960-*-* | \
m68*-*-lynxos* | \
fido*) targ_archs=bfd_m68k_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3-7]86) targ_archs=bfd_i386_arch ;;
-i370) targ_archs=bfd_i370_arch ;;
ia16) targ_archs=bfd_i386_arch ;;
lm32) targ_archs=bfd_lm32_arch ;;
m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
targ_selvecs=hppa_elf32_vec
;;
- i370-*-*)
- targ_defvec=i370_elf32_vec
- targ_selvecs="i370_elf32_vec"
- ;;
-
i[3-7]86-*-sco3.2v5*coff)
targ_defvec=i386_coff_vec
targ_selvecs=i386_elf32_vec
hppa_elf64_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
hppa_elf64_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
hppa_som_vec) tb="$tb som.lo" ;;
- i370_elf32_vec) tb="$tb elf32-i370.lo elf32.lo $elf" ;;
i386_aout_vec) tb="$tb i386aout.lo aout32.lo" ;;
i386_aout_bsd_vec) tb="$tb i386bsd.lo aout32.lo" ;;
i386_aout_dynix_vec) tb="$tb i386dynix.lo aout32.lo" ;;
COREFILE=netbsd-core.lo
;;
- i370-*-*)
- COREFILE=trad-core.lo
- TRAD_HEADER='"hosts/i370linux.h"'
- ;;
-
i[3-7]86-sequent-bsd*)
COREFILE=trad-core.lo
TRAD_HEADER='"hosts/symmetry.h"'
hppa_elf64_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
hppa_elf64_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
hppa_som_vec) tb="$tb som.lo" ;;
- i370_elf32_vec) tb="$tb elf32-i370.lo elf32.lo $elf" ;;
i386_aout_vec) tb="$tb i386aout.lo aout32.lo" ;;
i386_aout_bsd_vec) tb="$tb i386bsd.lo aout32.lo" ;;
i386_aout_dynix_vec) tb="$tb i386dynix.lo aout32.lo" ;;
COREFILE=netbsd-core.lo
;;
- i370-*-*)
- COREFILE=trad-core.lo
- TRAD_HEADER='"hosts/i370linux.h"'
- ;;
-
changequote(,)dnl
i[3-7]86-sequent-bsd*)
changequote([,])dnl
+++ /dev/null
-/* BFD i370 CPU definition
- Copyright (C) 1994-2018 Free Software Foundation, Inc.
- Contributed by Ian Lance Taylor, Cygnus Support.
- Hacked by Linas Vepstas <linas@linas.org> in 1998, 1999
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "libbfd.h"
-
-static const bfd_arch_info_type arch_info_struct[] =
-{
- /* Hack alert: old old machines are really 16 and 24 bit arch ... */
- {
- 32, /* 32 bits in a word. */
- 32, /* 32 bits in an address. */
- 8, /* 8 bits in a byte. */
- bfd_arch_i370,
- 360, /* For the 360. */
- "i370",
- "i370:360",
- 3,
- FALSE, /* Not the default. */
- bfd_default_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- &arch_info_struct[1]
- },
- {
- 32, /* 32 bits in a word. */
- 32, /* 32 bits in an address. */
- 8, /* 8 bits in a byte. */
- bfd_arch_i370,
- 370, /* For the 370. */
- "i370",
- "i370:370",
- 3,
- FALSE, /* Not the default. */
- bfd_default_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- 0
- },
-};
-
-const bfd_arch_info_type bfd_i370_arch =
-{
- 32, /* 32 bits in a word. */
- 32, /* 32 bits in an address. */
- 8, /* 8 bits in a byte. */
- bfd_arch_i370,
- 0, /* For the 360/370 common architecture. */
- "i370",
- "i370:common",
- 3,
- TRUE, /* The default. */
- bfd_default_compatible,
- bfd_default_scan,
- bfd_arch_default_fill,
- & arch_info_struct[0]
-};
+++ /dev/null
-/* i370-specific support for 32-bit ELF
- Copyright (C) 1994-2018 Free Software Foundation, Inc.
- Written by Ian Lance Taylor, Cygnus Support.
- Hacked by Linas Vepstas for i370 linas@linas.org
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-/* This file is based on a preliminary PowerPC ELF ABI.
- But its been hacked on for the IBM 360/370 architectures.
- Basically, the 31bit relocation works, and just about everything
- else is a wild card. In particular, don't expect shared libs or
- dynamic loading to work ... its never been tested. */
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "bfdlink.h"
-#include "libbfd.h"
-#include "elf-bfd.h"
-#include "elf/i370.h"
-
-static reloc_howto_type *i370_elf_howto_table[ (int)R_I370_max ];
-
-static reloc_howto_type i370_elf_howto_raw[] =
-{
- /* This reloc does nothing. */
- HOWTO (R_I370_NONE, /* type */
- 0, /* rightshift */
- 3, /* size (0 = byte, 1 = short, 2 = long) */
- 0, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_dont, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_NONE", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0, /* dst_mask */
- FALSE), /* pcrel_offset */
-
- /* A standard 31 bit relocation. */
- HOWTO (R_I370_ADDR31, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 31, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_ADDR31", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0x7fffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
-
- /* A standard 32 bit relocation. */
- HOWTO (R_I370_ADDR32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_ADDR32", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
-
- /* A standard 16 bit relocation. */
- HOWTO (R_I370_ADDR16, /* type */
- 0, /* rightshift */
- 1, /* size (0 = byte, 1 = short, 2 = long) */
- 16, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_ADDR16", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xffff, /* dst_mask */
- FALSE), /* pcrel_offset */
-
- /* 31-bit PC relative. */
- HOWTO (R_I370_REL31, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 31, /* bitsize */
- TRUE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_REL31", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0x7fffffff, /* dst_mask */
- TRUE), /* pcrel_offset */
-
- /* 32-bit PC relative. */
- HOWTO (R_I370_REL32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- TRUE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_REL32", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xffffffff, /* dst_mask */
- TRUE), /* pcrel_offset */
-
- /* A standard 12 bit relocation. */
- HOWTO (R_I370_ADDR12, /* type */
- 0, /* rightshift */
- 1, /* size (0 = byte, 1 = short, 2 = long) */
- 12, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_ADDR12", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xfff, /* dst_mask */
- FALSE), /* pcrel_offset */
-
- /* 12-bit PC relative. */
- HOWTO (R_I370_REL12, /* type */
- 0, /* rightshift */
- 1, /* size (0 = byte, 1 = short, 2 = long) */
- 12, /* bitsize */
- TRUE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_REL12", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xfff, /* dst_mask */
- TRUE), /* pcrel_offset */
-
- /* A standard 8 bit relocation. */
- HOWTO (R_I370_ADDR8, /* type */
- 0, /* rightshift */
- 0, /* size (0 = byte, 1 = short, 2 = long) */
- 8, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_ADDR8", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xff, /* dst_mask */
- FALSE), /* pcrel_offset */
-
- /* 8-bit PC relative. */
- HOWTO (R_I370_REL8, /* type */
- 0, /* rightshift */
- 0, /* size (0 = byte, 1 = short, 2 = long) */
- 8, /* bitsize */
- TRUE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_REL8", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xff, /* dst_mask */
- TRUE), /* pcrel_offset */
-
- /* This is used only by the dynamic linker. The symbol should exist
- both in the object being run and in some shared library. The
- dynamic linker copies the data addressed by the symbol from the
- shared library into the object, because the object being
- run has to have the data at some particular address. */
- HOWTO (R_I370_COPY, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_COPY", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0, /* dst_mask */
- FALSE), /* pcrel_offset */
-
- /* Used only by the dynamic linker. When the object is run, this
- longword is set to the load address of the object, plus the
- addend. */
- HOWTO (R_I370_RELATIVE, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_I370_RELATIVE", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
-
-};
-\f
-/* Initialize the i370_elf_howto_table, so that linear accesses can be done. */
-
-static void
-i370_elf_howto_init (void)
-{
- unsigned int i, type;
-
- for (i = 0; i < sizeof (i370_elf_howto_raw) / sizeof (i370_elf_howto_raw[0]); i++)
- {
- type = i370_elf_howto_raw[i].type;
- BFD_ASSERT (type < sizeof (i370_elf_howto_table) / sizeof (i370_elf_howto_table[0]));
- i370_elf_howto_table[type] = &i370_elf_howto_raw[i];
- }
-}
-
-static reloc_howto_type *
-i370_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
- bfd_reloc_code_real_type code)
-{
- enum i370_reloc_type i370_reloc = R_I370_NONE;
-
- if (!i370_elf_howto_table[ R_I370_ADDR31 ])
- /* Initialize howto table if needed. */
- i370_elf_howto_init ();
-
- switch ((int) code)
- {
- default:
- return NULL;
-
- case BFD_RELOC_NONE: i370_reloc = R_I370_NONE; break;
- case BFD_RELOC_32: i370_reloc = R_I370_ADDR31; break;
- case BFD_RELOC_16: i370_reloc = R_I370_ADDR16; break;
- case BFD_RELOC_32_PCREL: i370_reloc = R_I370_REL31; break;
- case BFD_RELOC_CTOR: i370_reloc = R_I370_ADDR31; break;
- case BFD_RELOC_I370_D12: i370_reloc = R_I370_ADDR12; break;
- }
-
- return i370_elf_howto_table[ (int)i370_reloc ];
-};
-
-static reloc_howto_type *
-i370_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
- const char *r_name)
-{
- unsigned int i;
-
- for (i = 0;
- i < sizeof (i370_elf_howto_raw) / sizeof (i370_elf_howto_raw[0]);
- i++)
- if (i370_elf_howto_raw[i].name != NULL
- && strcasecmp (i370_elf_howto_raw[i].name, r_name) == 0)
- return &i370_elf_howto_raw[i];
-
- return NULL;
-}
-
-/* The name of the dynamic interpreter. This is put in the .interp
- section. */
-
-#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so"
-
-/* Set the howto pointer for an i370 ELF reloc. */
-
-static bfd_boolean
-i370_elf_info_to_howto (bfd *abfd,
- arelent *cache_ptr,
- Elf_Internal_Rela *dst)
-{
- unsigned int r_type;
-
- if (!i370_elf_howto_table[ R_I370_ADDR31 ])
- /* Initialize howto table. */
- i370_elf_howto_init ();
-
- r_type = ELF32_R_TYPE (dst->r_info);
- if (r_type >= R_I370_max)
- {
- /* xgettext:c-format */
- _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
- abfd, r_type);
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
- cache_ptr->howto = i370_elf_howto_table[r_type];
- return TRUE;
-}
-
-/* Hack alert -- the following several routines look generic to me ...
- why are we bothering with them ? */
-/* Function to set whether a module needs the -mrelocatable bit set. */
-
-static bfd_boolean
-i370_elf_set_private_flags (bfd *abfd, flagword flags)
-{
- BFD_ASSERT (!elf_flags_init (abfd)
- || elf_elfheader (abfd)->e_flags == flags);
-
- elf_elfheader (abfd)->e_flags = flags;
- elf_flags_init (abfd) = TRUE;
- return TRUE;
-}
-
-/* Merge backend specific data from an object file to the output
- object file when linking. */
-
-static bfd_boolean
-i370_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
-{
- bfd *obfd = info->output_bfd;
- flagword old_flags;
- flagword new_flags;
-
- if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
- || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
- return TRUE;
-
- new_flags = elf_elfheader (ibfd)->e_flags;
- old_flags = elf_elfheader (obfd)->e_flags;
- if (!elf_flags_init (obfd)) /* First call, no flags set. */
- {
- elf_flags_init (obfd) = TRUE;
- elf_elfheader (obfd)->e_flags = new_flags;
- }
-
- else if (new_flags == old_flags) /* Compatible flags are ok. */
- ;
-
- else /* Incompatible flags. */
- {
- _bfd_error_handler
- /* xgettext:c-format */
- (_("%pB: uses different e_flags (%#x) fields than previous modules (%#x)"),
- ibfd, new_flags, old_flags);
-
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
-
- return TRUE;
-}
-\f
-/* Handle an i370 specific section when reading an object file. This
- is called when elfcode.h finds a section with an unknown type. */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_section_from_shdr (bfd *abfd,
- Elf_Internal_Shdr *hdr,
- const char *name,
- int shindex)
-{
- asection *newsect;
- flagword flags;
-
- if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
- return FALSE;
-
- newsect = hdr->bfd_section;
- flags = bfd_get_section_flags (abfd, newsect);
- if (hdr->sh_type == SHT_ORDERED)
- flags |= SEC_SORT_ENTRIES;
-
- bfd_set_section_flags (abfd, newsect, flags);
- return TRUE;
-}
-\f
-/* Set up any other section flags and such that may be necessary. */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED,
- Elf_Internal_Shdr *shdr,
- asection *asect)
-{
- if ((asect->flags & (SEC_GROUP | SEC_EXCLUDE)) == SEC_EXCLUDE)
- shdr->sh_flags |= SHF_EXCLUDE;
-
- if ((asect->flags & SEC_SORT_ENTRIES) != 0)
- shdr->sh_type = SHT_ORDERED;
-
- return TRUE;
-}
-\f
-/* We have to create .dynsbss and .rela.sbss here so that they get mapped
- to output sections (just like _bfd_elf_create_dynamic_sections has
- to create .dynbss and .rela.bss). */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
-{
- asection *s;
- flagword flags;
-
- if (!_bfd_elf_create_dynamic_sections(abfd, info))
- return FALSE;
-
- flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
- | SEC_LINKER_CREATED);
-
- s = bfd_make_section_anyway_with_flags (abfd, ".dynsbss",
- SEC_ALLOC | SEC_LINKER_CREATED);
- if (s == NULL)
- return FALSE;
-
- if (! bfd_link_pic (info))
- {
- s = bfd_make_section_anyway_with_flags (abfd, ".rela.sbss",
- flags | SEC_READONLY);
- if (s == NULL
- || ! bfd_set_section_alignment (abfd, s, 2))
- return FALSE;
- }
-
- /* XXX beats me, seem to need a rela.text ... */
- s = bfd_make_section_anyway_with_flags (abfd, ".rela.text",
- flags | SEC_READONLY);
- if (s == NULL
- || ! bfd_set_section_alignment (abfd, s, 2))
- return FALSE;
- return TRUE;
-}
-
-/* Adjust a symbol defined by a dynamic object and referenced by a
- regular object. The current definition is in some section of the
- dynamic object, but we're not including those sections. We have to
- change the definition to something the rest of the link can
- understand. */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
- struct elf_link_hash_entry *h)
-{
- bfd *dynobj = elf_hash_table (info)->dynobj;
- asection *s;
-
-#ifdef DEBUG
- fprintf (stderr, "i370_elf_adjust_dynamic_symbol called for %s\n",
- h->root.root.string);
-#endif
-
- /* Make sure we know what is going on here. */
- BFD_ASSERT (dynobj != NULL
- && (h->needs_plt
- || h->is_weakalias
- || (h->def_dynamic
- && h->ref_regular
- && !h->def_regular)));
-
- s = bfd_get_linker_section (dynobj, ".rela.text");
- BFD_ASSERT (s != NULL);
- s->size += sizeof (Elf32_External_Rela);
-
- /* If this is a weak symbol, and there is a real definition, the
- processor independent code will have arranged for us to see the
- real definition first, and we can just use the same value. */
- if (h->is_weakalias)
- {
- struct elf_link_hash_entry *def = weakdef (h);
- BFD_ASSERT (def->root.type == bfd_link_hash_defined);
- h->root.u.def.section = def->root.u.def.section;
- h->root.u.def.value = def->root.u.def.value;
- return TRUE;
- }
-
- /* This is a reference to a symbol defined by a dynamic object which
- is not a function. */
-
- /* If we are creating a shared library, we must presume that the
- only references to the symbol are via the global offset table.
- For such cases we need not do anything here; the relocations will
- be handled correctly by relocate_section. */
- if (bfd_link_pic (info))
- return TRUE;
-
- /* We must allocate the symbol in our .dynbss section, which will
- become part of the .bss section of the executable. There will be
- an entry for this symbol in the .dynsym section. The dynamic
- object will contain position independent code, so all references
- from the dynamic object to this symbol will go through the global
- offset table. The dynamic linker will use the .dynsym entry to
- determine the address it must put in the global offset table, so
- both the dynamic object and the regular object will refer to the
- same memory location for the variable.
-
- Of course, if the symbol is sufficiently small, we must instead
- allocate it in .sbss. FIXME: It would be better to do this if and
- only if there were actually SDAREL relocs for that symbol. */
-
- if (h->size <= elf_gp_size (dynobj))
- s = bfd_get_linker_section (dynobj, ".dynsbss");
- else
- s = bfd_get_linker_section (dynobj, ".dynbss");
- BFD_ASSERT (s != NULL);
-
- /* We must generate a R_I370_COPY reloc to tell the dynamic linker to
- copy the initial value out of the dynamic object and into the
- runtime process image. We need to remember the offset into the
- .rela.bss section we are going to use. */
- if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
- {
- asection *srel;
-
- if (h->size <= elf_gp_size (dynobj))
- srel = bfd_get_linker_section (dynobj, ".rela.sbss");
- else
- srel = bfd_get_linker_section (dynobj, ".rela.bss");
- BFD_ASSERT (srel != NULL);
- srel->size += sizeof (Elf32_External_Rela);
- h->needs_copy = 1;
- }
-
- return _bfd_elf_adjust_dynamic_copy (info, h, s);
-}
-\f
-/* Increment the index of a dynamic symbol by a given amount. Called
- via elf_link_hash_traverse. */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_adjust_dynindx (struct elf_link_hash_entry *h, void * cparg)
-{
- int *cp = (int *) cparg;
-
-#ifdef DEBUG
- fprintf (stderr,
- "i370_elf_adjust_dynindx called, h->dynindx = %ld, *cp = %d\n",
- h->dynindx, *cp);
-#endif
-
- if (h->dynindx != -1)
- h->dynindx += *cp;
-
- return TRUE;
-}
-\f
-/* Set the sizes of the dynamic sections. */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_size_dynamic_sections (bfd *output_bfd,
- struct bfd_link_info *info)
-{
- bfd *dynobj;
- asection *s;
- bfd_boolean plt;
- bfd_boolean relocs;
- bfd_boolean reltext;
-
-#ifdef DEBUG
- fprintf (stderr, "i370_elf_size_dynamic_sections called\n");
-#endif
-
- dynobj = elf_hash_table (info)->dynobj;
- BFD_ASSERT (dynobj != NULL);
-
- if (elf_hash_table (info)->dynamic_sections_created)
- {
- /* Set the contents of the .interp section to the interpreter. */
- if (bfd_link_executable (info) && !info->nointerp)
- {
- s = bfd_get_linker_section (dynobj, ".interp");
- BFD_ASSERT (s != NULL);
- s->size = sizeof ELF_DYNAMIC_INTERPRETER;
- s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
- }
- }
- else
- {
- /* We may have created entries in the .rela.got, .rela.sdata, and
- .rela.sdata2 sections. However, if we are not creating the
- dynamic sections, we will not actually use these entries. Reset
- the size of .rela.got, et al, which will cause it to get
- stripped from the output file below. */
- static char *rela_sections[] = { ".rela.got", ".rela.sdata",
- ".rela.sdata2", ".rela.sbss",
- NULL };
- char **p;
-
- for (p = rela_sections; *p != NULL; p++)
- {
- s = bfd_get_linker_section (dynobj, *p);
- if (s != NULL)
- s->size = 0;
- }
- }
-
- /* The check_relocs and adjust_dynamic_symbol entry points have
- determined the sizes of the various dynamic sections. Allocate
- memory for them. */
- plt = FALSE;
- relocs = FALSE;
- reltext = FALSE;
- for (s = dynobj->sections; s != NULL; s = s->next)
- {
- const char *name;
-
- if ((s->flags & SEC_LINKER_CREATED) == 0)
- continue;
-
- /* It's OK to base decisions on the section name, because none
- of the dynobj section names depend upon the input files. */
- name = bfd_get_section_name (dynobj, s);
-
- if (strcmp (name, ".plt") == 0)
- {
- /* Remember whether there is a PLT. */
- plt = s->size != 0;
- }
- else if (CONST_STRNEQ (name, ".rela"))
- {
- if (s->size != 0)
- {
- asection *target;
- const char *outname;
-
- /* Remember whether there are any relocation sections. */
- relocs = TRUE;
-
- /* If this relocation section applies to a read only
- section, then we probably need a DT_TEXTREL entry. */
- outname = bfd_get_section_name (output_bfd,
- s->output_section);
- target = bfd_get_section_by_name (output_bfd, outname + 5);
- if (target != NULL
- && (target->flags & SEC_READONLY) != 0
- && (target->flags & SEC_ALLOC) != 0)
- reltext = TRUE;
-
- /* We use the reloc_count field as a counter if we need
- to copy relocs into the output file. */
- s->reloc_count = 0;
- }
- }
- else if (strcmp (name, ".got") != 0
- && strcmp (name, ".sdata") != 0
- && strcmp (name, ".sdata2") != 0
- && strcmp (name, ".dynbss") != 0
- && strcmp (name, ".dynsbss") != 0)
- {
- /* It's not one of our sections, so don't allocate space. */
- continue;
- }
-
- if (s->size == 0)
- {
- /* If we don't need this section, strip it from the
- output file. This is mostly to handle .rela.bss and
- .rela.plt. We must create both sections in
- create_dynamic_sections, because they must be created
- before the linker maps input sections to output
- sections. The linker does that before
- adjust_dynamic_symbol is called, and it is that
- function which decides whether anything needs to go
- into these sections. */
- s->flags |= SEC_EXCLUDE;
- continue;
- }
-
- if ((s->flags & SEC_HAS_CONTENTS) == 0)
- continue;
-
- /* Allocate memory for the section contents. */
- s->contents = bfd_zalloc (dynobj, s->size);
- if (s->contents == NULL)
- return FALSE;
- }
-
- if (elf_hash_table (info)->dynamic_sections_created)
- {
- /* Add some entries to the .dynamic section. We fill in the
- values later, in i370_elf_finish_dynamic_sections, but we
- must add the entries now so that we get the correct size for
- the .dynamic section. The DT_DEBUG entry is filled in by the
- dynamic linker and used by the debugger. */
-#define add_dynamic_entry(TAG, VAL) \
- _bfd_elf_add_dynamic_entry (info, TAG, VAL)
-
- if (!bfd_link_pic (info))
- {
- if (!add_dynamic_entry (DT_DEBUG, 0))
- return FALSE;
- }
-
- if (plt)
- {
- if (!add_dynamic_entry (DT_PLTGOT, 0)
- || !add_dynamic_entry (DT_PLTRELSZ, 0)
- || !add_dynamic_entry (DT_PLTREL, DT_RELA)
- || !add_dynamic_entry (DT_JMPREL, 0))
- return FALSE;
- }
-
- if (relocs)
- {
- if (!add_dynamic_entry (DT_RELA, 0)
- || !add_dynamic_entry (DT_RELASZ, 0)
- || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
- return FALSE;
- }
-
- if (reltext)
- {
- if (!add_dynamic_entry (DT_TEXTREL, 0))
- return FALSE;
- info->flags |= DF_TEXTREL;
- }
- }
-#undef add_dynamic_entry
-
- /* If we are generating a shared library, we generate a section
- symbol for each output section. These are local symbols, which
- means that they must come first in the dynamic symbol table.
- That means we must increment the dynamic symbol index of every
- other dynamic symbol.
-
- FIXME: We assume that there will never be relocations to
- locations in linker-created sections that do not have
- externally-visible names. Instead, we should work out precisely
- which sections relocations are targeted at. */
- if (bfd_link_pic (info))
- {
- int c;
-
- for (c = 0, s = output_bfd->sections; s != NULL; s = s->next)
- {
- if ((s->flags & SEC_LINKER_CREATED) != 0
- || (s->flags & SEC_ALLOC) == 0)
- {
- elf_section_data (s)->dynindx = -1;
- continue;
- }
-
- /* These symbols will have no names, so we don't need to
- fiddle with dynstr_index. */
-
- elf_section_data (s)->dynindx = c + 1;
-
- c++;
- }
-
- elf_link_hash_traverse (elf_hash_table (info),
- i370_elf_adjust_dynindx, & c);
- elf_hash_table (info)->dynsymcount += c;
- }
-
- return TRUE;
-}
-\f
-/* Look through the relocs for a section during the first phase, and
- allocate space in the global offset table or procedure linkage
- table. */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_check_relocs (bfd *abfd,
- struct bfd_link_info *info,
- asection *sec,
- const Elf_Internal_Rela *relocs)
-{
- bfd *dynobj;
- Elf_Internal_Shdr *symtab_hdr;
- struct elf_link_hash_entry **sym_hashes;
- const Elf_Internal_Rela *rel;
- const Elf_Internal_Rela *rel_end;
- asection *sreloc;
-
- if (bfd_link_relocatable (info))
- return TRUE;
-
-#ifdef DEBUG
- _bfd_error_handler ("i370_elf_check_relocs called for section %pA in %pB",
- sec, abfd);
-#endif
-
- dynobj = elf_hash_table (info)->dynobj;
- symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- sym_hashes = elf_sym_hashes (abfd);
-
- sreloc = NULL;
-
- rel_end = relocs + sec->reloc_count;
- for (rel = relocs; rel < rel_end; rel++)
- {
- unsigned long r_symndx;
- struct elf_link_hash_entry *h;
-
- r_symndx = ELF32_R_SYM (rel->r_info);
- if (r_symndx < symtab_hdr->sh_info)
- h = NULL;
- else
- {
- h = sym_hashes[r_symndx - symtab_hdr->sh_info];
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
- }
-
- if (bfd_link_pic (info))
- {
-#ifdef DEBUG
- fprintf (stderr,
- "i370_elf_check_relocs needs to create relocation for %s\n",
- (h && h->root.root.string)
- ? h->root.root.string : "<unknown>");
-#endif
- if (sreloc == NULL)
- {
- sreloc = _bfd_elf_make_dynamic_reloc_section
- (sec, dynobj, 2, abfd, /*rela?*/ TRUE);
-
- if (sreloc == NULL)
- return FALSE;
- }
-
- sreloc->size += sizeof (Elf32_External_Rela);
-
- /* FIXME: We should here do what the m68k and i386
- backends do: if the reloc is pc-relative, record it
- in case it turns out that the reloc is unnecessary
- because the symbol is forced local by versioning or
- we are linking with -Bdynamic. Fortunately this
- case is not frequent. */
- }
- }
-
- return TRUE;
-}
-\f
-/* Finish up the dynamic sections. */
-/* XXX hack alert bogus This routine is mostly all junk and almost
- certainly does the wrong thing. Its here simply because it does
- just enough to allow glibc-2.1 ld.so to compile & link. */
-
-static bfd_boolean
-i370_elf_finish_dynamic_sections (bfd *output_bfd,
- struct bfd_link_info *info)
-{
- asection *sdyn;
- bfd *dynobj = elf_hash_table (info)->dynobj;
- asection *sgot = elf_hash_table (info)->sgot;
-
-#ifdef DEBUG
- fprintf (stderr, "i370_elf_finish_dynamic_sections called\n");
-#endif
-
- sdyn = bfd_get_linker_section (dynobj, ".dynamic");
-
- if (elf_hash_table (info)->dynamic_sections_created)
- {
- asection *splt;
- Elf32_External_Dyn *dyncon, *dynconend;
-
- splt = elf_hash_table (info)->splt;
- BFD_ASSERT (splt != NULL && sdyn != NULL);
-
- dyncon = (Elf32_External_Dyn *) sdyn->contents;
- dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
- for (; dyncon < dynconend; dyncon++)
- {
- Elf_Internal_Dyn dyn;
- asection *s;
- bfd_boolean size;
-
- bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
-
- switch (dyn.d_tag)
- {
- case DT_PLTGOT:
- s = elf_hash_table (info)->splt;
- size = FALSE;
- break;
- case DT_PLTRELSZ:
- s = elf_hash_table (info)->srelplt;
- size = TRUE;
- break;
- case DT_JMPREL:
- s = elf_hash_table (info)->srelplt;
- size = FALSE;
- break;
- default:
- continue;
- }
-
- if (s == NULL)
- dyn.d_un.d_val = 0;
- else
- {
- if (!size)
- dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
- else
- dyn.d_un.d_val = s->size;
- }
- bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
- }
- }
-
- if (sgot && sgot->size != 0)
- {
- unsigned char *contents = sgot->contents;
-
- if (sdyn == NULL)
- bfd_put_32 (output_bfd, (bfd_vma) 0, contents);
- else
- bfd_put_32 (output_bfd,
- sdyn->output_section->vma + sdyn->output_offset,
- contents);
-
- elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
- }
-
- if (bfd_link_pic (info))
- {
- asection *sdynsym;
- asection *s;
- Elf_Internal_Sym sym;
- int maxdindx = 0;
-
- /* Set up the section symbols for the output sections. */
-
- sdynsym = bfd_get_linker_section (dynobj, ".dynsym");
- BFD_ASSERT (sdynsym != NULL);
-
- sym.st_size = 0;
- sym.st_name = 0;
- sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_SECTION);
- sym.st_other = 0;
- sym.st_target_internal = 0;
-
- for (s = output_bfd->sections; s != NULL; s = s->next)
- {
- int indx, dindx;
- Elf32_External_Sym *esym;
-
- sym.st_value = s->vma;
-
- indx = elf_section_data (s)->this_idx;
- dindx = elf_section_data (s)->dynindx;
- if (dindx != -1)
- {
- BFD_ASSERT(indx > 0);
- BFD_ASSERT(dindx > 0);
-
- if (dindx > maxdindx)
- maxdindx = dindx;
-
- sym.st_shndx = indx;
-
- esym = (Elf32_External_Sym *) sdynsym->contents + dindx;
- bfd_elf32_swap_symbol_out (output_bfd, &sym, esym, NULL);
- }
- }
-
- /* Set the sh_info field of the output .dynsym section to the
- index of the first global symbol. */
- elf_section_data (sdynsym->output_section)->this_hdr.sh_info =
- maxdindx + 1;
- }
-
- return TRUE;
-}
-\f
-/* The RELOCATE_SECTION function is called by the ELF backend linker
- to handle the relocations for a section.
-
- The relocs are always passed as Rela structures; if the section
- actually uses Rel structures, the r_addend field will always be
- zero.
-
- This function is responsible for adjust the section contents as
- necessary, and (if using Rela relocs and generating a
- relocatable output file) adjusting the reloc addend as
- necessary.
-
- This function does not have to worry about setting the reloc
- address or the reloc symbol index.
-
- LOCAL_SYMS is a pointer to the swapped in local symbols.
-
- LOCAL_SECTIONS is an array giving the section in the input file
- corresponding to the st_shndx field of each local symbol.
-
- The global hash table entry for the global symbols can be found
- via elf_sym_hashes (input_bfd).
-
- When generating relocatable output, this function must handle
- STB_LOCAL/STT_SECTION symbols specially. The output symbol is
- going to be the section symbol corresponding to the output
- section, which means that the addend must be adjusted
- accordingly. */
-
-static bfd_boolean
-i370_elf_relocate_section (bfd *output_bfd,
- struct bfd_link_info *info,
- bfd *input_bfd,
- asection *input_section,
- bfd_byte *contents,
- Elf_Internal_Rela *relocs,
- Elf_Internal_Sym *local_syms,
- asection **local_sections)
-{
- Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
- struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
- Elf_Internal_Rela *rel = relocs;
- Elf_Internal_Rela *relend = relocs + input_section->reloc_count;
- asection *sreloc = NULL;
- bfd_boolean ret = TRUE;
-
-#ifdef DEBUG
- _bfd_error_handler ("i370_elf_relocate_section called for %pB section %pA, %u relocations%s",
- input_bfd, input_section,
- input_section->reloc_count,
- (bfd_link_relocatable (info)) ? " (relocatable)" : "");
-#endif
-
- if (!i370_elf_howto_table[ R_I370_ADDR31 ])
- /* Initialize howto table if needed. */
- i370_elf_howto_init ();
-
- for (; rel < relend; rel++)
- {
- enum i370_reloc_type r_type = (enum i370_reloc_type) ELF32_R_TYPE (rel->r_info);
- bfd_vma offset = rel->r_offset;
- bfd_vma addend = rel->r_addend;
- bfd_reloc_status_type r = bfd_reloc_other;
- Elf_Internal_Sym *sym = NULL;
- asection *sec = NULL;
- struct elf_link_hash_entry * h = NULL;
- reloc_howto_type *howto;
- unsigned long r_symndx;
- bfd_vma relocation;
-
- /* Unknown relocation handling. */
- if ((unsigned) r_type >= (unsigned) R_I370_max
- || !i370_elf_howto_table[(int)r_type])
- {
- /* xgettext:c-format */
- _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
- input_bfd, (int) r_type);
-
- bfd_set_error (bfd_error_bad_value);
- ret = FALSE;
- continue;
- }
-
- howto = i370_elf_howto_table[(int) r_type];
- r_symndx = ELF32_R_SYM (rel->r_info);
- relocation = 0;
-
- if (r_symndx < symtab_hdr->sh_info)
- {
- sym = local_syms + r_symndx;
- sec = local_sections[r_symndx];
-
- relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
- addend = rel->r_addend;
- }
- else
- {
- h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-
- if (info->wrap_hash != NULL
- && (input_section->flags & SEC_DEBUGGING) != 0)
- h = ((struct elf_link_hash_entry *)
- unwrap_hash_lookup (info, input_bfd, &h->root));
-
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
- if (h->root.type == bfd_link_hash_defined
- || h->root.type == bfd_link_hash_defweak)
- {
- sec = h->root.u.def.section;
- if (bfd_link_pic (info)
- && ((! info->symbolic && h->dynindx != -1)
- || !h->def_regular)
- && (input_section->flags & SEC_ALLOC) != 0
- && (r_type == R_I370_ADDR31
- || r_type == R_I370_COPY
- || r_type == R_I370_ADDR16
- || r_type == R_I370_RELATIVE))
- /* In these cases, we don't need the relocation
- value. We check specially because in some
- obscure cases sec->output_section will be NULL. */
- ;
- else
- relocation = (h->root.u.def.value
- + sec->output_section->vma
- + sec->output_offset);
- }
- else if (h->root.type == bfd_link_hash_undefweak)
- ;
- else if (info->unresolved_syms_in_objects == RM_IGNORE
- && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
- ;
- else if (!bfd_link_relocatable (info))
- {
- (*info->callbacks->undefined_symbol)
- (info, h->root.root.string, input_bfd,
- input_section, rel->r_offset,
- (info->unresolved_syms_in_objects == RM_GENERATE_ERROR
- || ELF_ST_VISIBILITY (h->other)));
- ret = FALSE;
- continue;
- }
- }
-
- if (sec != NULL && discarded_section (sec))
- RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
- rel, 1, relend, howto, 0, contents);
-
- if (bfd_link_relocatable (info))
- continue;
-
- switch ((int) r_type)
- {
- default:
- _bfd_error_handler
- (_("%pB: unsupported relocation type %#x"),
- input_bfd, (int) r_type);
-
- bfd_set_error (bfd_error_bad_value);
- ret = FALSE;
- continue;
-
- case (int) R_I370_NONE:
- continue;
-
- /* Relocations that may need to be propagated if this is a shared
- object. */
- case (int) R_I370_REL31:
- /* If these relocations are not to a named symbol, they can be
- handled right here, no need to bother the dynamic linker. */
- if (h == NULL
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
- break;
- /* Fall through. */
-
- /* Relocations that always need to be propagated if this is a shared
- object. */
- case (int) R_I370_ADDR31:
- case (int) R_I370_ADDR16:
- if (bfd_link_pic (info)
- && r_symndx != STN_UNDEF)
- {
- Elf_Internal_Rela outrel;
- bfd_byte *loc;
- int skip;
-
-#ifdef DEBUG
- fprintf (stderr,
- "i370_elf_relocate_section needs to create relocation for %s\n",
- (h && h->root.root.string) ? h->root.root.string : "<unknown>");
-#endif
-
- /* When generating a shared object, these relocations
- are copied into the output file to be resolved at run
- time. */
-
- if (sreloc == NULL)
- {
- sreloc = _bfd_elf_get_dynamic_reloc_section
- (input_bfd, input_section, /*rela?*/ TRUE);
- if (sreloc == NULL)
- return FALSE;
- }
-
- skip = 0;
-
- outrel.r_offset =
- _bfd_elf_section_offset (output_bfd, info, input_section,
- rel->r_offset);
- if (outrel.r_offset == (bfd_vma) -1
- || outrel.r_offset == (bfd_vma) -2)
- skip = (int) outrel.r_offset;
- outrel.r_offset += (input_section->output_section->vma
- + input_section->output_offset);
-
- if (skip)
- memset (&outrel, 0, sizeof outrel);
- /* h->dynindx may be -1 if this symbol was marked to
- become local. */
- else if (h != NULL
- && ((! info->symbolic && h->dynindx != -1)
- || !h->def_regular))
- {
- BFD_ASSERT (h->dynindx != -1);
- outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
- outrel.r_addend = rel->r_addend;
- }
- else
- {
- if (r_type == R_I370_ADDR31)
- {
- outrel.r_info = ELF32_R_INFO (0, R_I370_RELATIVE);
- outrel.r_addend = relocation + rel->r_addend;
- }
- else
- {
- long indx;
-
- if (bfd_is_abs_section (sec))
- indx = 0;
- else if (sec == NULL || sec->owner == NULL)
- {
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
- else
- {
- asection *osec;
-
- /* We are turning this relocation into one
- against a section symbol. It would be
- proper to subtract the symbol's value,
- osec->vma, from the emitted reloc addend,
- but ld.so expects buggy relocs. */
- osec = sec->output_section;
- indx = elf_section_data (osec)->dynindx;
- if (indx == 0)
- {
- struct elf_link_hash_table *htab;
- htab = elf_hash_table (info);
- osec = htab->text_index_section;
- indx = elf_section_data (osec)->dynindx;
- }
- BFD_ASSERT (indx != 0);
-#ifdef DEBUG
- if (indx <= 0)
- {
- printf ("indx=%ld section=%s flags=%08x name=%s\n",
- indx, osec->name, osec->flags,
- h->root.root.string);
- }
-#endif
- }
-
- outrel.r_info = ELF32_R_INFO (indx, r_type);
- outrel.r_addend = relocation + rel->r_addend;
- }
- }
-
- loc = sreloc->contents;
- loc += sreloc->reloc_count++ * sizeof (Elf32_External_Rela);
- bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
-
- /* This reloc will be computed at runtime, so there's no
- need to do anything now, unless this is a RELATIVE
- reloc in an unallocated section. */
- if (skip == -1
- || (input_section->flags & SEC_ALLOC) != 0
- || ELF32_R_TYPE (outrel.r_info) != R_I370_RELATIVE)
- continue;
- }
- break;
-
- case (int) R_I370_COPY:
- case (int) R_I370_RELATIVE:
- /* xgettext:c-format */
- _bfd_error_handler (_("%pB: %s unsupported"),
- input_bfd,
- i370_elf_howto_table[(int) r_type]->name);
- bfd_set_error (bfd_error_invalid_operation);
- ret = FALSE;
- continue;
- }
-
- r = _bfd_final_link_relocate (howto, input_bfd, input_section, contents,
- offset, relocation, addend);
-
- if (r != bfd_reloc_ok)
- {
- ret = FALSE;
- switch (r)
- {
- default:
- break;
-
- case bfd_reloc_overflow:
- {
- const char *name;
-
- if (h != NULL)
- name = NULL;
- else
- {
- name = bfd_elf_string_from_elf_section (input_bfd,
- symtab_hdr->sh_link,
- sym->st_name);
- if (name == NULL)
- break;
-
- if (*name == '\0')
- name = bfd_section_name (input_bfd, sec);
- }
-
- (*info->callbacks->reloc_overflow) (info,
- (h ? &h->root : NULL),
- name,
- howto->name,
- (bfd_vma) 0,
- input_bfd,
- input_section,
- offset);
- }
- break;
- }
- }
- }
-
-#ifdef DEBUG
- fprintf (stderr, "\n");
-#endif
-
- return ret;
-}
-\f
-#define TARGET_BIG_SYM i370_elf32_vec
-#define TARGET_BIG_NAME "elf32-i370"
-#define ELF_ARCH bfd_arch_i370
-#define ELF_MACHINE_CODE EM_S370
-#ifdef EM_I370_OLD
-#define ELF_MACHINE_ALT1 EM_I370_OLD
-#endif
-#define ELF_MAXPAGESIZE 0x1000
-#define ELF_OSABI ELFOSABI_GNU
-
-#define elf_info_to_howto i370_elf_info_to_howto
-
-#define elf_backend_plt_not_loaded 1
-#define elf_backend_rela_normal 1
-
-#define bfd_elf32_bfd_reloc_type_lookup i370_elf_reloc_type_lookup
-#define bfd_elf32_bfd_reloc_name_lookup i370_elf_reloc_name_lookup
-#define bfd_elf32_bfd_set_private_flags i370_elf_set_private_flags
-#define bfd_elf32_bfd_merge_private_bfd_data i370_elf_merge_private_bfd_data
-#define elf_backend_relocate_section i370_elf_relocate_section
-
-/* Dynamic loader support is mostly broken; just enough here to be able to
- link glibc's ld.so without errors. */
-#define elf_backend_create_dynamic_sections i370_elf_create_dynamic_sections
-#define elf_backend_size_dynamic_sections i370_elf_size_dynamic_sections
-#define elf_backend_init_index_section _bfd_elf_init_1_index_section
-#define elf_backend_finish_dynamic_sections i370_elf_finish_dynamic_sections
-#define elf_backend_fake_sections i370_elf_fake_sections
-#define elf_backend_section_from_shdr i370_elf_section_from_shdr
-#define elf_backend_adjust_dynamic_symbol i370_elf_adjust_dynamic_symbol
-#define elf_backend_check_relocs i370_elf_check_relocs
-
-static bfd_boolean
-i370_noop (bfd * abfd ATTRIBUTE_UNUSED, ...)
-{
- return TRUE;
-}
-
-#define elf_backend_finish_dynamic_symbol \
- (bfd_boolean (*) \
- (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *, \
- Elf_Internal_Sym *)) i370_noop
-
-#include "elf32-target.h"
cpu-ft32.c
cpu-h8300.c
cpu-hppa.c
-cpu-i370.c
cpu-i386.c
cpu-ia64.c
cpu-iamcu.c
elf32-h8300.c
elf32-hppa.c
elf32-hppa.h
-elf32-i370.c
elf32-i386.c
elf32-ip2k.c
elf32-iq2000.c
extern const bfd_target hppa_elf64_vec;
extern const bfd_target hppa_elf64_linux_vec;
extern const bfd_target hppa_som_vec;
-extern const bfd_target i370_elf32_vec;
extern const bfd_target i386_aout_vec;
extern const bfd_target i386_aout_bsd_vec;
extern const bfd_target i386_aout_dynix_vec;
#endif
&hppa_som_vec,
- &i370_elf32_vec,
-
&i386_aout_vec,
&i386_aout_bsd_vec,
#if 0
2018-04-16 Alan Modra <amodra@gmail.com>
+ * readelf.c: Remove i370 support.
+ * testsuite/binutils-all/objdump.exp: Likewise.
+
+2018-04-16 Alan Modra <amodra@gmail.com>
+
* testsuite/binutils-all/objcopy.exp: Remove h8500 support.
* testsuite/lib/binutils-common.exp: Likewise.
#include "elf/h8.h"
#include "elf/hppa.h"
#include "elf/i386.h"
-#include "elf/i370.h"
#include "elf/ia64.h"
#include "elf/ip2k.h"
#include "elf/lm32.h"
rtype = elf_x86_64_reloc_type (type);
break;
- case EM_S370:
- rtype = i370_reloc_type (type);
- break;
-
case EM_S390_OLD:
case EM_S390:
rtype = elf_s390_reloc_type (type);
return reloc_type == 1; /* R_RL78_DIR32. */
case EM_RX:
return reloc_type == 1; /* R_RX_DIR32. */
- case EM_S370:
- return reloc_type == 1; /* R_I370_ADDR31. */
case EM_S390_OLD:
case EM_S390:
return reloc_type == 4; /* R_S390_32. */
if { ![is_elf_format]
|| [istarget "hppa64*-*-hpux*"]
- || [istarget "i370-*-*"]
|| [istarget "ia64*-*-*"]
|| [istarget "mcore-*-*"]
|| [istarget "moxie-*-*"]
2018-04-16 Alan Modra <amodra@gmail.com>
+ * Makefile.am: Remove i370 support.
+ * app.c: Likewise.
+ * config/obj-elf.c: Likewise.
+ * configure.tgt: Likewise.
+ * doc/Makefile.am: Likewise.
+ * doc/as.texinfo: Likewise.
+ * testsuite/gas/all/gas.exp: Likewise.
+ * testsuite/gas/elf/warn-2.s: Likewise.
+ * testsuite/gas/lns/lns.exp: Likewise.
+ * config/tc-i370.c: Delete.
+ * config/tc-i370.h: Delete.
+ * doc/c-i370.texi: Delete.
+ * Makefile.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2018-04-16 Alan Modra <amodra@gmail.com>
+
* config/obj-coff.h: Remove h8500 support.
2018-04-16 Alan Modra <amodra@gmail.com>
config/tc-h8300.c \
config/tc-hppa.c \
config/tc-ia64.c \
- config/tc-i370.c \
config/tc-i386.c \
config/tc-ip2k.c \
config/tc-iq2000.c \
config/tc-h8300.h \
config/tc-hppa.h \
config/tc-ia64.h \
- config/tc-i370.h \
config/tc-i386.h \
config/tc-ip2k.h \
config/tc-iq2000.h \
config/tc-h8300.c \
config/tc-hppa.c \
config/tc-ia64.c \
- config/tc-i370.c \
config/tc-i386.c \
config/tc-ip2k.c \
config/tc-iq2000.c \
config/tc-h8300.h \
config/tc-hppa.h \
config/tc-ia64.h \
- config/tc-i370.h \
config/tc-i386.h \
config/tc-ip2k.h \
config/tc-iq2000.h \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ft32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-h8300.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-hppa.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-i370.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-i386.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ia64.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ip2k.Po@am__quote@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-ia64.obj `if test -f 'config/tc-ia64.c'; then $(CYGPATH_W) 'config/tc-ia64.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-ia64.c'; fi`
-tc-i370.o: config/tc-i370.c
-@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-i370.o -MD -MP -MF $(DEPDIR)/tc-i370.Tpo -c -o tc-i370.o `test -f 'config/tc-i370.c' || echo '$(srcdir)/'`config/tc-i370.c
-@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-i370.Tpo $(DEPDIR)/tc-i370.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-i370.c' object='tc-i370.o' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-i370.o `test -f 'config/tc-i370.c' || echo '$(srcdir)/'`config/tc-i370.c
-
-tc-i370.obj: config/tc-i370.c
-@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-i370.obj -MD -MP -MF $(DEPDIR)/tc-i370.Tpo -c -o tc-i370.obj `if test -f 'config/tc-i370.c'; then $(CYGPATH_W) 'config/tc-i370.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-i370.c'; fi`
-@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-i370.Tpo $(DEPDIR)/tc-i370.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-i370.c' object='tc-i370.obj' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-i370.obj `if test -f 'config/tc-i370.c'; then $(CYGPATH_W) 'config/tc-i370.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-i370.c'; fi`
-
tc-i386.o: config/tc-i386.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-i386.o -MD -MP -MF $(DEPDIR)/tc-i386.Tpo -c -o tc-i386.o `test -f 'config/tc-i386.c' || echo '$(srcdir)/'`config/tc-i386.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-i386.Tpo $(DEPDIR)/tc-i386.Po
{
lex['"'] = LEX_IS_STRINGQUOTE;
-#if ! defined (TC_HPPA) && ! defined (TC_I370)
- /* I370 uses single-quotes to delimit integer, float constants. */
+#if ! defined (TC_HPPA)
lex['\''] = LEX_IS_ONECHAR_QUOTE;
#endif
#include "elf/ppc.h"
#endif
-#ifdef TC_I370
-#include "elf/i370.h"
-#endif
-
#ifdef TC_I386
#include "elf/x86-64.h"
#endif
subsegT new_subsection = -1;
unsigned int info = 0;
-#ifndef TC_I370
if (flag_mri)
{
char mri_type;
return;
}
-#endif /* ! defined (TC_I370) */
name = obj_elf_section_name ();
if (name == NULL)
+++ /dev/null
-/* tc-i370.c -- Assembler for the IBM 360/370/390 instruction set.
- Loosely based on the ppc files by Linas Vepstas <linas@linas.org> 1998, 99
- Copyright (C) 1994-2018 Free Software Foundation, Inc.
- Written by Ian Lance Taylor, Cygnus Support.
-
- This file is part of GAS, the GNU Assembler.
-
- GAS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- GAS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to the Free
- Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
- 02110-1301, USA. */
-
-/* This assembler implements a very hacked version of an elf-like thing
- that gcc emits (when gcc is suitably hacked). To make it behave more
- HLASM-like, try turning on the -M or --mri flag (as there are various
- similarities between HLASM and the MRI assemblers, such as section
- names, lack of leading . in pseudo-ops, DC and DS, etc. */
-
-#include "as.h"
-#include "safe-ctype.h"
-#include "subsegs.h"
-#include "struc-symbol.h"
-
-#include "opcode/i370.h"
-
-#ifdef OBJ_ELF
-#include "elf/i370.h"
-#endif
-
-/* This is the assembler for the System/390 Architecture. */
-
-/* Tell the main code what the endianness is. */
-extern int target_big_endian;
-
-\f
-/* Generic assembler global variables which must be defined by all
- targets. */
-
-#ifdef OBJ_ELF
-/* This string holds the chars that always start a comment. If the
- pre-processor is disabled, these aren't very useful. The macro
- tc_comment_chars points to this. We use this, rather than the
- usual comment_chars, so that we can switch for Solaris conventions. */
-static const char i370_eabi_comment_chars[] = "#";
-
-const char *i370_comment_chars = i370_eabi_comment_chars;
-#else
-const char comment_chars[] = "#";
-#endif
-
-/* Characters which start a comment at the beginning of a line. */
-const char line_comment_chars[] = "#*";
-
-/* Characters which may be used to separate multiple commands on a
- single line. */
-const char line_separator_chars[] = ";";
-
-/* Characters which are used to indicate an exponent in a floating
- point number. */
-const char EXP_CHARS[] = "eE";
-
-/* Characters which mean that a number is a floating point constant,
- as in 0d1.0. */
-const char FLT_CHARS[] = "dD";
-
-void
-md_show_usage (FILE *stream)
-{
- fprintf (stream, "\
-S/370 options: (these have not yet been tested and may not work) \n\
--u ignored\n\
--mregnames Allow symbolic names for registers\n\
--mno-regnames Do not allow symbolic names for registers\n");
-#ifdef OBJ_ELF
- fprintf (stream, "\
--mrelocatable support for GCC's -mrelocatble option\n\
--mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
--V print assembler version number\n");
-#endif
-}
-
-/* Whether to use user friendly register names. */
-#define TARGET_REG_NAMES_P TRUE
-
-static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
-
-\f
-/* Predefined register names if -mregnames
- In general, there are lots of them, in an attempt to be compatible
- with a number of assemblers. */
-
-/* Structure to hold information about predefined registers. */
-struct pd_reg
- {
- const char *name;
- int value;
- };
-
-/* List of registers that are pre-defined:
-
- Each general register has predefined names of the form:
- 1. r<reg_num> which has the value <reg_num>.
- 2. r.<reg_num> which has the value <reg_num>.
-
- Each floating point register has predefined names of the form:
- 1. f<reg_num> which has the value <reg_num>.
- 2. f.<reg_num> which has the value <reg_num>.
-
- There are only four floating point registers, and these are
- commonly labelled 0,2,4 and 6. Thus, there is no f1, f3, etc.
-
- There are individual registers as well:
- rbase or r.base has the value 3 (base register)
- rpgt or r.pgt has the value 4 (page origin table pointer)
- rarg or r.arg has the value 11 (argument pointer)
- rtca or r.tca has the value 12 (table of contents pointer)
- rtoc or r.toc has the value 12 (table of contents pointer)
- sp or r.sp has the value 13 (stack pointer)
- dsa or r.dsa has the value 13 (stack pointer)
- lr has the value 14 (link reg)
-
- The table is sorted. Suitable for searching by a binary search. */
-
-static const struct pd_reg pre_defined_registers[] =
-{
- { "arg", 11 }, /* Argument Pointer. */
- { "base", 3 }, /* Base Reg. */
-
- { "f.0", 0 }, /* Floating point registers. */
- { "f.2", 2 },
- { "f.4", 4 },
- { "f.6", 6 },
-
- { "f0", 0 },
- { "f2", 2 },
- { "f4", 4 },
- { "f6", 6 },
-
- { "dsa",13 }, /* Stack pointer. */
- { "lr", 14 }, /* Link Register. */
- { "pgt", 4 }, /* Page Origin Table Pointer. */
-
- { "r.0", 0 }, /* General Purpose Registers. */
- { "r.1", 1 },
- { "r.10", 10 },
- { "r.11", 11 },
- { "r.12", 12 },
- { "r.13", 13 },
- { "r.14", 14 },
- { "r.15", 15 },
- { "r.2", 2 },
- { "r.3", 3 },
- { "r.4", 4 },
- { "r.5", 5 },
- { "r.6", 6 },
- { "r.7", 7 },
- { "r.8", 8 },
- { "r.9", 9 },
-
- { "r.arg", 11 }, /* Argument Pointer. */
- { "r.base", 3 }, /* Base Reg. */
- { "r.dsa", 13 }, /* Stack Pointer. */
- { "r.pgt", 4 }, /* Page Origin Table Pointer. */
- { "r.sp", 13 }, /* Stack Pointer. */
-
- { "r.tca", 12 }, /* Pointer to the table of contents. */
- { "r.toc", 12 }, /* Pointer to the table of contents. */
-
- { "r0", 0 }, /* More general purpose registers. */
- { "r1", 1 },
- { "r10", 10 },
- { "r11", 11 },
- { "r12", 12 },
- { "r13", 13 },
- { "r14", 14 },
- { "r15", 15 },
- { "r2", 2 },
- { "r3", 3 },
- { "r4", 4 },
- { "r5", 5 },
- { "r6", 6 },
- { "r7", 7 },
- { "r8", 8 },
- { "r9", 9 },
-
- { "rbase", 3 }, /* Base Reg. */
-
- { "rtca", 12 }, /* Pointer to the table of contents. */
- { "rtoc", 12 }, /* Pointer to the table of contents. */
-
- { "sp", 13 }, /* Stack Pointer. */
-
-};
-
-#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
-
-/* Given NAME, find the register number associated with that name, return
- the integer value associated with the given name or -1 on failure. */
-
-static int
-reg_name_search (const struct pd_reg *regs,
- int regcount,
- const char *name)
-{
- int middle, low, high;
- int cmp;
-
- low = 0;
- high = regcount - 1;
-
- do
- {
- middle = (low + high) / 2;
- cmp = strcasecmp (name, regs[middle].name);
- if (cmp < 0)
- high = middle - 1;
- else if (cmp > 0)
- low = middle + 1;
- else
- return regs[middle].value;
- }
- while (low <= high);
-
- return -1;
-}
-
-/* Summary of register_name().
-
- in: Input_line_pointer points to 1st char of operand.
-
- out: An expressionS.
- The operand may have been a register: in this case, X_op == O_register,
- X_add_number is set to the register number, and truth is returned.
- Input_line_pointer->(next non-blank) char after operand, or is in its
- original state. */
-
-static bfd_boolean
-register_name (expressionS *expressionP)
-{
- int reg_number;
- char *name;
- char *start;
- char c;
-
- /* Find the spelling of the operand. */
- start = name = input_line_pointer;
- if (name[0] == '%' && ISALPHA (name[1]))
- name = ++input_line_pointer;
-
- else if (!reg_names_p)
- return FALSE;
-
- while (' ' == *name)
- name = ++input_line_pointer;
-
- /* If it's a number, treat it as a number. If it's alpha, look to
- see if it's in the register table. */
- if (!ISALPHA (name[0]))
- reg_number = get_single_number ();
- else
- {
- c = get_symbol_name (&name);
- reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
-
- /* Put back the delimiting char. */
- (void) restore_line_pointer (c);
- }
-
- /* If numeric, make sure it's not out of bounds. */
- if ((0 <= reg_number) && (16 >= reg_number))
- {
- expressionP->X_op = O_register;
- expressionP->X_add_number = reg_number;
-
- /* Make the rest nice. */
- expressionP->X_add_symbol = NULL;
- expressionP->X_op_symbol = NULL;
- return TRUE;
- }
-
- /* Reset the line as if we had not done anything. */
- input_line_pointer = start;
- return FALSE;
-}
-\f
-/* Local variables. */
-
-/* The type of processor we are assembling for. This is one or more
- of the I370_OPCODE flags defined in opcode/i370.h. */
-static int i370_cpu = 0;
-
-/* The base register to use for opcode with optional operands.
- We define two of these: "text" and "other". Normally, "text"
- would get used in the .text section for branches, while "other"
- gets used in the .data section for address constants.
-
- The idea of a second base register in a different section
- is foreign to the usual HLASM-style semantics; however, it
- allows us to provide support for dynamically loaded libraries,
- by allowing us to place address constants in a section other
- than the text section. The "other" section need not be the
- .data section, it can be any section that isn't the .text section.
-
- Note that HLASM defines a multiple, concurrent .using semantic
- that we do not: in calculating offsets, it uses either the most
- recent .using directive, or the one with the smallest displacement.
- This allows HLASM to support a quasi-block-scope-like behaviour.
- Handy for people writing assembly by hand ... but not supported
- by us. */
-static int i370_using_text_regno = -1;
-static int i370_using_other_regno = -1;
-
-/* The base address for address literals. */
-static expressionS i370_using_text_baseaddr;
-static expressionS i370_using_other_baseaddr;
-
-/* the "other" section, used only for syntax error detection. */
-static segT i370_other_section = undefined_section;
-
-/* Opcode hash table. */
-static struct hash_control *i370_hash;
-
-/* Macro hash table. */
-static struct hash_control *i370_macro_hash;
-
-#ifdef OBJ_ELF
-/* What type of shared library support to use. */
-static enum { SHLIB_NONE, SHLIB_PIC, SHILB_MRELOCATABLE } shlib = SHLIB_NONE;
-#endif
-
-/* Flags to set in the elf header. */
-static flagword i370_flags = 0;
-
-#ifndef WORKING_DOT_WORD
-int md_short_jump_size = 4;
-int md_long_jump_size = 4;
-#endif
-\f
-#ifdef OBJ_ELF
-const char *md_shortopts = "l:um:K:VQ:";
-#else
-const char *md_shortopts = "um:";
-#endif
-struct option md_longopts[] =
-{
- {NULL, no_argument, NULL, 0}
-};
-size_t md_longopts_size = sizeof (md_longopts);
-
-int
-md_parse_option (int c, const char *arg)
-{
- switch (c)
- {
- case 'u':
- /* -u means that any undefined symbols should be treated as
- external, which is the default for gas anyhow. */
- break;
-
-#ifdef OBJ_ELF
- case 'K':
- /* Recognize -K PIC */
- if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
- {
- shlib = SHLIB_PIC;
- i370_flags |= EF_I370_RELOCATABLE_LIB;
- }
- else
- return 0;
-
- break;
-#endif
-
- case 'm':
-
- /* -m360 mean to assemble for the ancient 360 architecture. */
- if (strcmp (arg, "360") == 0 || strcmp (arg, "i360") == 0)
- i370_cpu = I370_OPCODE_360;
- /* -mxa means to assemble for the IBM 370 XA. */
- else if (strcmp (arg, "xa") == 0)
- i370_cpu = I370_OPCODE_370_XA;
- /* -many means to assemble for any architecture (370/XA). */
- else if (strcmp (arg, "any") == 0)
- i370_cpu = I370_OPCODE_370;
-
- else if (strcmp (arg, "regnames") == 0)
- reg_names_p = TRUE;
-
- else if (strcmp (arg, "no-regnames") == 0)
- reg_names_p = FALSE;
-
-#ifdef OBJ_ELF
- /* -mrelocatable/-mrelocatable-lib -- warn about
- initializations that require relocation. */
- else if (strcmp (arg, "relocatable") == 0)
- {
- shlib = SHILB_MRELOCATABLE;
- i370_flags |= EF_I370_RELOCATABLE;
- }
- else if (strcmp (arg, "relocatable-lib") == 0)
- {
- shlib = SHILB_MRELOCATABLE;
- i370_flags |= EF_I370_RELOCATABLE_LIB;
- }
-#endif
- else
- {
- as_bad (_("invalid switch -m%s"), arg);
- return 0;
- }
- break;
-
-#ifdef OBJ_ELF
- /* -V: SVR4 argument to print version ID. */
- case 'V':
- print_version_id ();
- break;
-
- /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
- should be emitted or not. FIXME: Not implemented. */
- case 'Q':
- break;
-
-#endif
-
- default:
- return 0;
- }
-
- return 1;
-}
-
-\f
-/* Set i370_cpu if it is not already set.
- Currently defaults to the reasonable superset;
- but can be made more fine grained if desired. */
-
-static void
-i370_set_cpu (void)
-{
- const char *default_os = TARGET_OS;
- const char *default_cpu = TARGET_CPU;
-
- /* Override with the superset for the moment. */
- i370_cpu = I370_OPCODE_ESA390_SUPERSET;
- if (i370_cpu == 0)
- {
- if (strcmp (default_cpu, "i360") == 0)
- i370_cpu = I370_OPCODE_360;
- else if (strcmp (default_cpu, "i370") == 0)
- i370_cpu = I370_OPCODE_370;
- else if (strcmp (default_cpu, "XA") == 0)
- i370_cpu = I370_OPCODE_370_XA;
- else
- as_fatal ("Unknown default cpu = %s, os = %s", default_cpu, default_os);
- }
-}
-
-/* Figure out the BFD architecture to use.
- FIXME: specify the different 370 architectures. */
-
-enum bfd_architecture
-i370_arch (void)
-{
- return bfd_arch_i370;
-}
-
-/* This function is called when the assembler starts up. It is called
- after the options have been parsed and the output file has been
- opened. */
-
-void
-md_begin (void)
-{
- const struct i370_opcode *op;
- const struct i370_opcode *op_end;
- const struct i370_macro *macro;
- const struct i370_macro *macro_end;
- bfd_boolean dup_insn = FALSE;
-
- i370_set_cpu ();
-
-#ifdef OBJ_ELF
- /* Set the ELF flags if desired. */
- if (i370_flags)
- bfd_set_private_flags (stdoutput, i370_flags);
-#endif
-
- /* Insert the opcodes into a hash table. */
- i370_hash = hash_new ();
-
- op_end = i370_opcodes + i370_num_opcodes;
- for (op = i370_opcodes; op < op_end; op++)
- {
- know ((op->opcode.i[0] & op->mask.i[0]) == op->opcode.i[0]
- && (op->opcode.i[1] & op->mask.i[1]) == op->opcode.i[1]);
-
- if ((op->flags & i370_cpu) != 0)
- {
- const char *retval;
-
- retval = hash_insert (i370_hash, op->name, (void *) op);
- if (retval != (const char *) NULL)
- {
- as_bad (_("Internal assembler error for instruction %s"), op->name);
- dup_insn = TRUE;
- }
- }
- }
-
- /* Insert the macros into a hash table. */
- i370_macro_hash = hash_new ();
-
- macro_end = i370_macros + i370_num_macros;
- for (macro = i370_macros; macro < macro_end; macro++)
- {
- if ((macro->flags & i370_cpu) != 0)
- {
- const char *retval;
-
- retval = hash_insert (i370_macro_hash, macro->name, (void *) macro);
- if (retval != (const char *) NULL)
- {
- as_bad (_("Internal assembler error for macro %s"), macro->name);
- dup_insn = TRUE;
- }
- }
- }
-
- if (dup_insn)
- abort ();
-}
-
-/* Insert an operand value into an instruction. */
-
-static i370_insn_t
-i370_insert_operand (i370_insn_t insn,
- const struct i370_operand *operand,
- offsetT val)
-{
- if (operand->insert)
- {
- const char *errmsg;
-
- /* Used for 48-bit insn's. */
- errmsg = NULL;
- insn = (*operand->insert) (insn, (long) val, &errmsg);
- if (errmsg)
- as_bad ("%s", errmsg);
- }
- else
- /* This is used only for 16, 32 bit insn's. */
- insn.i[0] |= (((long) val & ((1 << operand->bits) - 1))
- << operand->shift);
-
- return insn;
-}
-
-\f
-#ifdef OBJ_ELF
-/* Parse @got, etc. and return the desired relocation.
- Currently, i370 does not support (don't really need to support) any
- of these fancier markups ... for example, no one is going to
- write 'L 6,=V(bogus)@got' it just doesn't make sense (at least to me).
- So basically, we could get away with this routine returning
- BFD_RELOC_UNUSED in all circumstances. However, I'll leave
- in for now in case someone ambitious finds a good use for this stuff ...
- this routine was pretty much just copied from the powerpc code ... */
-
-static bfd_reloc_code_real_type
-i370_elf_suffix (char **str_p, expressionS *exp_p)
-{
- struct map_bfd
- {
- const char *string;
- int length;
- bfd_reloc_code_real_type reloc;
- };
-
- char ident[20];
- char *str = *str_p;
- char *str2;
- int ch;
- int len;
- struct map_bfd *ptr;
-
-#define MAP(str,reloc) { str, sizeof (str) - 1, reloc }
-
- static struct map_bfd mapping[] =
- {
- /* warnings with -mrelocatable. */
- MAP ("fixup", BFD_RELOC_CTOR),
- { (char *)0, 0, BFD_RELOC_UNUSED }
- };
-
- if (*str++ != '@')
- return BFD_RELOC_UNUSED;
-
- for (ch = *str, str2 = ident;
- (str2 < ident + sizeof (ident) - 1
- && (ISALNUM (ch) || ch == '@'));
- ch = *++str)
- *str2++ = TOLOWER (ch);
-
- *str2 = '\0';
- len = str2 - ident;
-
- ch = ident[0];
- for (ptr = &mapping[0]; ptr->length > 0; ptr++)
- if (ch == ptr->string[0]
- && len == ptr->length
- && memcmp (ident, ptr->string, ptr->length) == 0)
- {
- if (exp_p->X_add_number != 0
- && (ptr->reloc == BFD_RELOC_16_GOTOFF
- || ptr->reloc == BFD_RELOC_LO16_GOTOFF
- || ptr->reloc == BFD_RELOC_HI16_GOTOFF
- || ptr->reloc == BFD_RELOC_HI16_S_GOTOFF))
- as_warn (_("identifier+constant@got means identifier@got+constant"));
-
- /* Now check for identifier@suffix+constant */
- if (*str == '-' || *str == '+')
- {
- char *orig_line = input_line_pointer;
- expressionS new_exp;
-
- input_line_pointer = str;
- expression (&new_exp);
- if (new_exp.X_op == O_constant)
- {
- exp_p->X_add_number += new_exp.X_add_number;
- str = input_line_pointer;
- }
-
- if (&input_line_pointer != str_p)
- input_line_pointer = orig_line;
- }
-
- *str_p = str;
- return ptr->reloc;
- }
-
- return BFD_RELOC_UNUSED;
-}
-
-/* Like normal .long/.short/.word, except support @got, etc.
- Clobbers input_line_pointer, checks end-of-line. */
-
-static void
-i370_elf_cons (int nbytes) /* 1=.byte, 2=.word, 4=.long. */
-{
- expressionS exp;
- bfd_reloc_code_real_type reloc;
-
- if (is_it_end_of_statement ())
- {
- demand_empty_rest_of_line ();
- return;
- }
-
- do
- {
- expression (&exp);
-
- if (exp.X_op == O_symbol
- && *input_line_pointer == '@'
- && (reloc = i370_elf_suffix (&input_line_pointer, &exp)) != BFD_RELOC_UNUSED)
- {
- reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
- int size = bfd_get_reloc_size (reloc_howto);
-
- if (size > nbytes)
- as_bad (ngettext ("%s relocations do not fit in %u byte",
- "%s relocations do not fit in %u bytes",
- nbytes),
- reloc_howto->name, nbytes);
- else
- {
- char *p = frag_more ((int) nbytes);
- int offset = nbytes - size;
-
- fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, &exp, 0, reloc);
- }
- }
- else
- emit_expr (&exp, (unsigned int) nbytes);
- }
- while (*input_line_pointer++ == ',');
-
- input_line_pointer--; /* Put terminator back into stream. */
- demand_empty_rest_of_line ();
-}
-
-\f
-/* ASCII to EBCDIC conversion table. */
-static unsigned char ascebc[256] =
-{
- /*00 NL SH SX EX ET NQ AK BL */
- 0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F,
- /*08 BS HT LF VT FF CR SO SI */
- 0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
- /*10 DL D1 D2 D3 D4 NK SN EB */
- 0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26,
- /*18 CN EM SB EC FS GS RS US */
- 0x18, 0x19, 0x3F, 0x27, 0x1C, 0x1D, 0x1E, 0x1F,
- /*20 SP ! " # $ % & ' */
- 0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D,
- /*28 ( ) * + , - . / */
- 0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61,
- /*30 0 1 2 3 4 5 6 7 */
- 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
- /*38 8 9 : ; < = > ? */
- 0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F,
- /*40 @ A B C D E F G */
- 0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7,
- /*48 H I J K L M N O */
- 0xC8, 0xC9, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6,
- /*50 P Q R S T U V W */
- 0xD7, 0xD8, 0xD9, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6,
- /*58 X Y Z [ \ ] ^ _ */
- 0xE7, 0xE8, 0xE9, 0xAD, 0xE0, 0xBD, 0x5F, 0x6D,
- /*60 ` a b c d e f g */
- 0x79, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
- /*68 h i j k l m n o */
- 0x88, 0x89, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96,
- /*70 p q r s t u v w */
- 0x97, 0x98, 0x99, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6,
- /*78 x y z { | } ~ DL */
- 0xA7, 0xA8, 0xA9, 0xC0, 0x4F, 0xD0, 0xA1, 0x07,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
- 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0xFF
-};
-
-/* EBCDIC to ASCII conversion table. */
-unsigned char ebcasc[256] =
-{
- /*00 NU SH SX EX PF HT LC DL */
- 0x00, 0x01, 0x02, 0x03, 0x00, 0x09, 0x00, 0x7F,
- /*08 SM VT FF CR SO SI */
- 0x00, 0x00, 0x00, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
- /*10 DE D1 D2 TM RS NL BS IL */
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x0A, 0x08, 0x00,
- /*18 CN EM CC C1 FS GS RS US */
- 0x18, 0x19, 0x00, 0x00, 0x1C, 0x1D, 0x1E, 0x1F,
- /*20 DS SS FS BP LF EB EC */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x17, 0x1B,
- /*28 SM C2 EQ AK BL */
- 0x00, 0x00, 0x00, 0x00, 0x05, 0x06, 0x07, 0x00,
- /*30 SY PN RS UC ET */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
- /*38 C3 D4 NK SU */
- 0x00, 0x00, 0x00, 0x00, 0x14, 0x15, 0x00, 0x1A,
- /*40 SP */
- 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*48 . < ( + | */
- 0x00, 0x00, 0x00, 0x2E, 0x3C, 0x28, 0x2B, 0x7C,
- /*50 & */
- 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*58 ! $ * ) ; ^ */
- 0x00, 0x00, 0x21, 0x24, 0x2A, 0x29, 0x3B, 0x5E,
- /*60 - / */
- 0x2D, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*68 , % _ > ? */
- 0x00, 0x00, 0x00, 0x2C, 0x25, 0x5F, 0x3E, 0x3F,
- /*70 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*78 ` : # @ ' = " */
- 0x00, 0x60, 0x3A, 0x23, 0x40, 0x27, 0x3D, 0x22,
- /*80 a b c d e f g */
- 0x00, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
- /*88 h i { */
- 0x68, 0x69, 0x00, 0x7B, 0x00, 0x00, 0x00, 0x00,
- /*90 j k l m n o p */
- 0x00, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70,
- /*98 q r } */
- 0x71, 0x72, 0x00, 0x7D, 0x00, 0x00, 0x00, 0x00,
- /*A0 ~ s t u v w x */
- 0x00, 0x7E, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
- /*A8 y z [ */
- 0x79, 0x7A, 0x00, 0x00, 0x00, 0x5B, 0x00, 0x00,
- /*B0 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*B8 ] */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x5D, 0x00, 0x00,
- /*C0 { A B C D E F G */
- 0x7B, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
- /*C8 H I */
- 0x48, 0x49, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*D0 } J K L M N O P */
- 0x7D, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50,
- /*D8 Q R */
- 0x51, 0x52, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*E0 \ S T U V W X */
- 0x5C, 0x00, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
- /*E8 Y Z */
- 0x59, 0x5A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /*F0 0 1 2 3 4 5 6 7 */
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
- /*F8 8 9 */
- 0x38, 0x39, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF
-};
-
-/* EBCDIC translation tables needed for 3270 support. */
-
-static void
-i370_ebcdic (int unused ATTRIBUTE_UNUSED)
-{
- char *p, *end;
- char delim = 0;
- size_t nbytes;
-
- nbytes = strlen (input_line_pointer);
- end = input_line_pointer + nbytes;
- while ('\r' == *end) end --;
- while ('\n' == *end) end --;
-
- delim = *input_line_pointer;
- if (('\'' == delim) || ('\"' == delim))
- {
- input_line_pointer ++;
- end = rindex (input_line_pointer, delim);
- }
-
- if (end > input_line_pointer)
- {
- nbytes = end - input_line_pointer +1;
- p = frag_more (nbytes);
- while (end > input_line_pointer)
- {
- *p = ascebc [(unsigned char) (*input_line_pointer)];
- ++p; ++input_line_pointer;
- }
- *p = '\0';
- }
- if (delim == *input_line_pointer) ++input_line_pointer;
-}
-
-\f
-/* Stub out a couple of routines. */
-
-static void
-i370_rmode (int unused ATTRIBUTE_UNUSED)
-{
- as_tsktsk ("rmode ignored");
-}
-
-static void
-i370_dsect (int sect)
-{
- char *save_line = input_line_pointer;
- static char section[] = ".data\n";
-
- /* Just pretend this is .section .data. */
- input_line_pointer = section;
- obj_elf_section (sect);
-
- input_line_pointer = save_line;
-}
-
-static void
-i370_csect (int unused ATTRIBUTE_UNUSED)
-{
- as_tsktsk ("csect not supported");
-}
-
-\f
-/* DC Define Const is only partially supported.
- For sample code on what to do, look at i370_elf_cons() above.
- This code handles pseudoops of the style
- DC D'3.141592653' # in sysv4, .double 3.14159265
- DC F'1' # in sysv4, .long 1. */
-
-static void
-i370_dc (int unused ATTRIBUTE_UNUSED)
-{
- char * p, tmp[50];
- int nbytes=0;
- expressionS exp;
- char type=0;
- char * clse;
-
- if (is_it_end_of_statement ())
- {
- demand_empty_rest_of_line ();
- return;
- }
-
- /* Figure out the size. */
- type = *input_line_pointer++;
- switch (type)
- {
- case 'H': /* 16-bit */
- nbytes = 2;
- break;
- case 'E': /* 32-bit */
- case 'F': /* 32-bit */
- nbytes = 4;
- break;
- case 'D': /* 64-bit */
- nbytes = 8;
- break;
- default:
- as_bad (_("unsupported DC type"));
- return;
- }
-
- /* Get rid of pesky quotes. */
- if ('\'' == *input_line_pointer)
- {
- ++input_line_pointer;
- clse = strchr (input_line_pointer, '\'');
- if (clse)
- *clse= ' ';
- else
- as_bad (_("missing end-quote"));
- }
-
- if ('\"' == *input_line_pointer)
- {
- ++input_line_pointer;
- clse = strchr (input_line_pointer, '\"');
- if (clse)
- *clse= ' ';
- else
- as_bad (_("missing end-quote"));
- }
-
- switch (type)
- {
- case 'H': /* 16-bit */
- case 'F': /* 32-bit */
- expression (&exp);
- emit_expr (&exp, nbytes);
- break;
- case 'E': /* 32-bit */
- type = 'f';
- /* Fall through. */
- case 'D': /* 64-bit */
- md_atof (type, tmp, &nbytes);
- p = frag_more (nbytes);
- memcpy (p, tmp, nbytes);
- break;
- default:
- as_bad (_("unsupported DC type"));
- return;
- }
-
- demand_empty_rest_of_line ();
-}
-
-\f
-/* Provide minimal support for DS Define Storage. */
-
-static void
-i370_ds (int unused ATTRIBUTE_UNUSED)
-{
- /* DS 0H or DS 0F or DS 0D. */
- if ('0' == *input_line_pointer)
- {
- int alignment = 0; /* Left shift 1 << align. */
- input_line_pointer ++;
- switch (*input_line_pointer++)
- {
- case 'H': /* 16-bit */
- alignment = 1;
- break;
- case 'F': /* 32-bit */
- alignment = 2;
- break;
- case 'D': /* 64-bit */
- alignment = 3;
- break;
- default:
- as_bad (_("unsupported alignment"));
- return;
- }
- frag_align (alignment, 0, 0);
- record_alignment (now_seg, alignment);
- }
- else
- as_bad (_("this DS form not yet supported"));
-}
-
-/* Solaris pseudo op to change to the .rodata section. */
-
-static void
-i370_elf_rdata (int sect)
-{
- char *save_line = input_line_pointer;
- static char section[] = ".rodata\n";
-
- /* Just pretend this is .section .rodata. */
- input_line_pointer = section;
- obj_elf_section (sect);
-
- input_line_pointer = save_line;
-}
-
-/* Pseudo op to make file scope bss items. */
-
-static void
-i370_elf_lcomm (int unused ATTRIBUTE_UNUSED)
-{
- char *name;
- char c;
- char *p;
- offsetT size;
- symbolS *symbolP;
- offsetT align;
- segT old_sec;
- int old_subsec;
- char *pfrag;
- int align2;
-
- c = get_symbol_name (&name);
-
- /* Just after name is now '\0'. */
- p = input_line_pointer;
- (void) restore_line_pointer (c);
- SKIP_WHITESPACE ();
- if (*input_line_pointer != ',')
- {
- as_bad (_("Expected comma after symbol-name: rest of line ignored."));
- ignore_rest_of_line ();
- return;
- }
-
- /* Skip ','. */
- input_line_pointer++;
- if ((size = get_absolute_expression ()) < 0)
- {
- as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
- ignore_rest_of_line ();
- return;
- }
-
- /* The third argument to .lcomm is the alignment. */
- if (*input_line_pointer != ',')
- align = 8;
- else
- {
- ++input_line_pointer;
- align = get_absolute_expression ();
- if (align <= 0)
- {
- as_warn (_("ignoring bad alignment"));
- align = 8;
- }
- }
-
- *p = 0;
- symbolP = symbol_find_or_make (name);
- *p = c;
-
- if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
- {
- as_bad (_("Ignoring attempt to re-define symbol `%s'."),
- S_GET_NAME (symbolP));
- ignore_rest_of_line ();
- return;
- }
-
- if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
- {
- as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
- S_GET_NAME (symbolP),
- (long) S_GET_VALUE (symbolP),
- (long) size);
-
- ignore_rest_of_line ();
- return;
- }
-
- /* Allocate_bss: */
- old_sec = now_seg;
- old_subsec = now_subseg;
- if (align)
- {
- /* Convert to a power of 2 alignment. */
- for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2)
- ;
- if (align != 1)
- {
- as_bad (_("Common alignment not a power of 2"));
- ignore_rest_of_line ();
- return;
- }
- }
- else
- align2 = 0;
-
- record_alignment (bss_section, align2);
- subseg_set (bss_section, 0);
- if (align2)
- frag_align (align2, 0, 0);
- if (S_GET_SEGMENT (symbolP) == bss_section)
- symbol_get_frag (symbolP)->fr_symbol = 0;
- symbol_set_frag (symbolP, frag_now);
- pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
- (char *) 0);
- *pfrag = 0;
- S_SET_SIZE (symbolP, size);
- S_SET_SEGMENT (symbolP, bss_section);
- subseg_set (old_sec, old_subsec);
- demand_empty_rest_of_line ();
-}
-
-/* Validate any relocations emitted for -mrelocatable, possibly adding
- fixups for word relocations in writable segments, so we can adjust
- them at runtime. */
-
-static void
-i370_elf_validate_fix (fixS *fixp, segT seg)
-{
- if (fixp->fx_done || fixp->fx_pcrel)
- return;
-
- switch (shlib)
- {
- case SHLIB_NONE:
- case SHLIB_PIC:
- return;
-
- case SHILB_MRELOCATABLE:
- if (fixp->fx_r_type <= BFD_RELOC_UNUSED
- && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
- && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
- && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
- && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
- && fixp->fx_r_type != BFD_RELOC_32_BASEREL
- && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
- && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
- && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
- && strcmp (segment_name (seg), ".got2") != 0
- && strcmp (segment_name (seg), ".dtors") != 0
- && strcmp (segment_name (seg), ".ctors") != 0
- && strcmp (segment_name (seg), ".fixup") != 0
- && strcmp (segment_name (seg), ".stab") != 0
- && strcmp (segment_name (seg), ".gcc_except_table") != 0
- && strcmp (segment_name (seg), ".ex_shared") != 0)
- {
- if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
- || fixp->fx_r_type != BFD_RELOC_CTOR)
- as_bad_where (fixp->fx_file, fixp->fx_line,
- "Relocation cannot be done when using -mrelocatable");
- }
- return;
- default:
- break;
- }
-}
-#endif /* OBJ_ELF */
-
-\f
-#define LITERAL_POOL_SUPPORT
-#ifdef LITERAL_POOL_SUPPORT
-/* Provide support for literal pools within the text section.
- Loosely based on similar code from tc-arm.c.
- We will use four symbols to locate four parts of the literal pool.
- These four sections contain 64,32,16 and 8-bit constants; we use
- four sections so that all memory access can be appropriately aligned.
- That is, we want to avoid mixing these together so that we don't
- waste space padding out to alignments. The four pointers
- longlong_poolP, word_poolP, etc. point to a symbol labeling the
- start of each pool part.
-
- lit_pool_num increments from zero to infinity and uniquely id's
- -- it's used to generate the *_poolP symbol name. */
-
-#define MAX_LITERAL_POOL_SIZE 1024
-
-typedef struct literalS
-{
- struct expressionS exp;
- char * sym_name;
- char size; /* 1,2,4 or 8 */
- short offset;
-} literalT;
-
-literalT literals[MAX_LITERAL_POOL_SIZE];
-int next_literal_pool_place = 0; /* Next free entry in the pool. */
-
-static symbolS *longlong_poolP = NULL; /* 64-bit pool entries. */
-static symbolS *word_poolP = NULL; /* 32-bit pool entries. */
-static symbolS *short_poolP = NULL; /* 16-bit pool entries. */
-static symbolS *byte_poolP = NULL; /* 8-bit pool entries. */
-
-static int lit_pool_num = 1;
-
-/* Create a new, empty symbol. */
-static symbolS *
-symbol_make_empty (void)
-{
- return symbol_create (FAKE_LABEL_NAME, undefined_section,
- (valueT) 0, &zero_address_frag);
-}
-
-/* Make the first argument an address-relative expression
- by subtracting the second argument. */
-
-static void
-i370_make_relative (expressionS *exx, expressionS *baseaddr)
-{
- if (O_constant == baseaddr->X_op)
- {
- exx->X_op = O_symbol;
- exx->X_add_number -= baseaddr->X_add_number;
- }
- else if (O_symbol == baseaddr->X_op)
- {
- exx->X_op = O_subtract;
- exx->X_op_symbol = baseaddr->X_add_symbol;
- exx->X_add_number -= baseaddr->X_add_number;
- }
- else if (O_uminus == baseaddr->X_op)
- {
- exx->X_op = O_add;
- exx->X_op_symbol = baseaddr->X_add_symbol;
- exx->X_add_number += baseaddr->X_add_number;
- }
- else
- as_bad (_("Missing or bad .using directive"));
-}
-/* Add an expression to the literal pool. */
-
-static void
-add_to_lit_pool (expressionS *exx, char *name, int sz)
-{
- int lit_count = 0;
- int offset_in_pool = 0;
-
- /* Start a new pool, if necessary. */
- if (8 == sz && NULL == longlong_poolP)
- longlong_poolP = symbol_make_empty ();
- else if (4 == sz && NULL == word_poolP)
- word_poolP = symbol_make_empty ();
- else if (2 == sz && NULL == short_poolP)
- short_poolP = symbol_make_empty ();
- else if (1 == sz && NULL == byte_poolP)
- byte_poolP = symbol_make_empty ();
-
- /* Check if this literal value is already in the pool.
- FIXME: We should probably be checking expressions
- of type O_symbol as well.
- FIXME: This is probably(certainly?) broken for O_big,
- which includes 64-bit long-longs. */
- while (lit_count < next_literal_pool_place)
- {
- if (exx->X_op == O_constant
- && literals[lit_count].exp.X_op == exx->X_op
- && literals[lit_count].exp.X_add_number == exx->X_add_number
- && literals[lit_count].exp.X_unsigned == exx->X_unsigned
- && literals[lit_count].size == sz)
- break;
- else if (literals[lit_count].sym_name
- && name
- && !strcmp (name, literals[lit_count].sym_name))
- break;
- if (sz == literals[lit_count].size)
- offset_in_pool += sz;
- lit_count ++;
- }
-
- if (lit_count == next_literal_pool_place) /* new entry */
- {
- if (next_literal_pool_place > MAX_LITERAL_POOL_SIZE)
- as_bad (_("Literal Pool Overflow"));
-
- literals[next_literal_pool_place].exp = *exx;
- literals[next_literal_pool_place].size = sz;
- literals[next_literal_pool_place].offset = offset_in_pool;
- if (name)
- literals[next_literal_pool_place].sym_name = strdup (name);
- else
- literals[next_literal_pool_place].sym_name = NULL;
- next_literal_pool_place++;
- }
-
- /* ???_poolP points to the beginning of the literal pool.
- X_add_number is the offset from the beginning of the
- literal pool to this expr minus the location of the most
- recent .using directive. Thus, the grand total value of the
- expression is the distance from .using to the literal. */
- if (8 == sz)
- exx->X_add_symbol = longlong_poolP;
- else if (4 == sz)
- exx->X_add_symbol = word_poolP;
- else if (2 == sz)
- exx->X_add_symbol = short_poolP;
- else if (1 == sz)
- exx->X_add_symbol = byte_poolP;
- exx->X_add_number = offset_in_pool;
- exx->X_op_symbol = NULL;
-
- /* If the user has set up a base reg in another section,
- use that; otherwise use the text section. */
- if (0 < i370_using_other_regno)
- i370_make_relative (exx, &i370_using_other_baseaddr);
- else
- i370_make_relative (exx, &i370_using_text_baseaddr);
-}
-
-/* The symbol setup for the literal pool is done in two steps. First,
- a symbol that represents the start of the literal pool is created,
- above, in the add_to_pool() routine. This sym ???_poolP.
- However, we don't know what fragment it's in until a bit later.
- So we defer the frag_now thing, and the symbol name, until .ltorg time. */
-
-/* Can't use symbol_new here, so have to create a symbol and then at
- a later date assign it a value. That's what these functions do. */
-
-static void
-symbol_locate (symbolS *symbolP,
- const char *name, /* It is copied, the caller can modify. */
- segT segment, /* Segment identifier (SEG_<something>). */
- valueT valu, /* Symbol value. */
- fragS *frag) /* Associated fragment. */
-{
- size_t name_length;
- char *preserved_copy_of_name;
-
- name_length = strlen (name) + 1; /* +1 for \0 */
- obstack_grow (¬es, name, name_length);
- preserved_copy_of_name = obstack_finish (¬es);
-
- S_SET_NAME (symbolP, preserved_copy_of_name);
-
- S_SET_SEGMENT (symbolP, segment);
- S_SET_VALUE (symbolP, valu);
- symbol_clear_list_pointers (symbolP);
-
- symbol_set_frag (symbolP, frag);
-
- /* Link to end of symbol chain. */
- {
- extern int symbol_table_frozen;
-
- if (symbol_table_frozen)
- abort ();
- }
-
- symbol_append (symbolP, symbol_lastP, &symbol_rootP, &symbol_lastP);
-
- obj_symbol_new_hook (symbolP);
-
-#ifdef tc_symbol_new_hook
- tc_symbol_new_hook (symbolP);
-#endif
-
-#define DEBUG_SYMS
-#ifdef DEBUG_SYMS
- verify_symbol_chain(symbol_rootP, symbol_lastP);
-#endif /* DEBUG_SYMS */
-}
-
-/* i370_addr_offset() will convert operand expressions
- that appear to be absolute into their base-register
- relative form. These expressions come in two types:
-
- (1) of the form "* + const" * where "*" means
- relative offset since the last using
- i.e. "*" means ".-using_baseaddr"
-
- (2) labels, which are never absolute, but are always
- relative to the last "using". Anything with an alpha
- character is considered to be a label (since symbols
- can never be operands), and since we've already handled
- register operands. For example, "BL .L33" branch low
- to .L33 RX form insn frequently terminates for-loops. */
-
-static bfd_boolean
-i370_addr_offset (expressionS *exx)
-{
- char *dot, *lab;
- int islabel = 0;
- int all_digits = 0;
-
- /* Search for a label; anything with an alpha char will do.
- Local labels consist of N digits followed by either b or f. */
- lab = input_line_pointer;
- while (*lab && (',' != *lab) && ('(' != *lab))
- {
- if (ISDIGIT (*lab))
- all_digits = 1;
- else if (ISALPHA (*lab))
- {
- if (!all_digits)
- {
- islabel = 1;
- break;
- }
- else if (('f' == *lab) || ('b' == *lab))
- {
- islabel = 1;
- break;
- }
- if (all_digits)
- break;
- }
- else if ('.' != *lab)
- break;
- ++lab;
- }
-
- /* See if operand has a * in it. */
- dot = strchr (input_line_pointer, '*');
-
- if (!dot && !islabel)
- return FALSE;
-
- /* Replace * with . and let expr munch on it. */
- if (dot)
- *dot = '.';
- expression (exx);
-
- /* OK, now we have to subtract the "using" location.
- Normally branches appear in the text section only. */
- if (0 == strncmp (now_seg->name, ".text", 5) || 0 > i370_using_other_regno)
- i370_make_relative (exx, &i370_using_text_baseaddr);
- else
- i370_make_relative (exx, &i370_using_other_baseaddr);
-
- /* Put the * back. */
- if (dot)
- *dot = '*';
-
- return TRUE;
-}
-
-/* Handle address constants of various sorts. */
-/* The currently supported types are
- =A(some_symb)
- =V(some_extern)
- =X'deadbeef' hexadecimal
- =F'1234' 32-bit const int
- =H'1234' 16-bit const int. */
-
-static bfd_boolean
-i370_addr_cons (expressionS *exp)
-{
- char *name;
- char *sym_name, delim;
- int name_len;
- int hex_len = 0;
- int cons_len = 0;
-
- name = input_line_pointer;
- sym_name = input_line_pointer;
- /* Find the spelling of the operand. */
- if (name[0] == '=' && ISALPHA (name[1]))
- name = ++input_line_pointer;
- else
- return FALSE;
-
- switch (name[0])
- {
- case 'A': /* A == address-of. */
- case 'V': /* V == extern. */
- ++input_line_pointer;
- expression (exp);
-
- /* We use a simple string name to collapse together
- multiple references to the same address literal. */
- name_len = strcspn (sym_name, ", ");
- delim = *(sym_name + name_len);
- *(sym_name + name_len) = 0x0;
- add_to_lit_pool (exp, sym_name, 4);
- *(sym_name + name_len) = delim;
-
- break;
- case 'H':
- case 'F':
- case 'X':
- case 'E': /* Single-precision float point. */
- case 'D': /* Double-precision float point. */
-
- /* H == 16-bit fixed-point const; expression must be const. */
- /* F == fixed-point const; expression must be const. */
- /* X == fixed-point const; expression must be const. */
- if ('H' == name[0]) cons_len = 2;
- else if ('F' == name[0]) cons_len = 4;
- else if ('X' == name[0]) cons_len = -1;
- else if ('E' == name[0]) cons_len = 4;
- else if ('D' == name[0]) cons_len = 8;
-
- /* Extract length, if it is present;
- FIXME: assume single-digit length. */
- if ('L' == name[1])
- {
- /* Should work for ASCII and EBCDIC. */
- cons_len = name[2] - '0';
- input_line_pointer += 2;
- }
-
- ++input_line_pointer;
-
- /* Get rid of pesky quotes. */
- if ('\'' == *input_line_pointer)
- {
- char * clse;
-
- ++input_line_pointer;
- clse = strchr (input_line_pointer, '\'');
- if (clse)
- *clse= ' ';
- else
- as_bad (_("missing end-quote"));
- }
- if ('\"' == *input_line_pointer)
- {
- char * clse;
-
- ++input_line_pointer;
- clse = strchr (input_line_pointer, '\"');
- if (clse)
- *clse= ' ';
- else
- as_bad (_("missing end-quote"));
- }
- if (('X' == name[0]) || ('E' == name[0]) || ('D' == name[0]))
- {
- char tmp[50];
- char *save;
-
- /* The length of hex constants is specified directly with L,
- or implied through the number of hex digits. For example:
- =X'AB' one byte
- =X'abcd' two bytes
- =X'000000AB' four bytes
- =XL4'AB' four bytes, left-padded with zero. */
- if (('X' == name[0]) && (0 > cons_len))
- {
- save = input_line_pointer;
- while (*save)
- {
- if (ISXDIGIT (*save))
- hex_len++;
- save++;
- }
- cons_len = (hex_len+1) /2;
- }
- /* I believe this works even for =XL8'dada0000beeebaaa'
- which should parse out to X_op == O_big
- Note that floats and doubles get represented as
- 0d3.14159265358979 or 0f 2.7. */
- tmp[0] = '0';
- tmp[1] = name[0];
- tmp[2] = 0;
- strcat (tmp, input_line_pointer);
- save = input_line_pointer;
- input_line_pointer = tmp;
- expression (exp);
- input_line_pointer = save + (input_line_pointer-tmp-2);
-
- /* Fix up lengths for floats and doubles. */
- if (O_big == exp->X_op)
- exp->X_add_number = cons_len / CHARS_PER_LITTLENUM;
- }
- else
- expression (exp);
-
- /* O_big occurs when more than 4 bytes worth gets parsed. */
- if ((exp->X_op != O_constant) && (exp->X_op != O_big))
- {
- as_bad (_("expression not a constant"));
- return FALSE;
- }
- add_to_lit_pool (exp, 0x0, cons_len);
- break;
-
- default:
- as_bad (_("Unknown/unsupported address literal type"));
- return FALSE;
- }
-
- return TRUE;
-}
-
-\f
-/* Dump the contents of the literal pool that we've accumulated so far.
- This aligns the pool to the size of the largest literal in the pool. */
-
-static void
-i370_ltorg (int ignore ATTRIBUTE_UNUSED)
-{
- int litsize;
- int lit_count = 0;
- int biggest_literal_size = 0;
- int biggest_align = 0;
- char pool_name[20];
-
- if (strncmp (now_seg->name, ".text", 5))
- {
- if (i370_other_section == undefined_section)
- as_bad (_(".ltorg without prior .using in section %s"),
- now_seg->name);
-
- if (i370_other_section != now_seg)
- as_bad (_(".ltorg in section %s paired to .using in section %s"),
- now_seg->name, i370_other_section->name);
- }
-
- if (! longlong_poolP
- && ! word_poolP
- && ! short_poolP
- && ! byte_poolP)
- /* Nothing to do. */
- return;
-
- /* Find largest literal .. 2 4 or 8. */
- lit_count = 0;
- while (lit_count < next_literal_pool_place)
- {
- if (biggest_literal_size < literals[lit_count].size)
- biggest_literal_size = literals[lit_count].size;
- lit_count ++;
- }
- if (1 == biggest_literal_size) biggest_align = 0;
- else if (2 == biggest_literal_size) biggest_align = 1;
- else if (4 == biggest_literal_size) biggest_align = 2;
- else if (8 == biggest_literal_size) biggest_align = 3;
- else as_bad (_("bad alignment of %d bytes in literal pool"), biggest_literal_size);
- if (0 == biggest_align) biggest_align = 1;
-
- /* Align pool for short, word, double word accesses. */
- frag_align (biggest_align, 0, 0);
- record_alignment (now_seg, biggest_align);
-
- /* Note that the gas listing will print only the first five
- entries in the pool .... wonder how to make it print more. */
- /* Output largest literals first, then the smaller ones. */
- for (litsize=8; litsize; litsize /=2)
- {
- symbolS *current_poolP = NULL;
- switch (litsize)
- {
- case 8:
- current_poolP = longlong_poolP; break;
- case 4:
- current_poolP = word_poolP; break;
- case 2:
- current_poolP = short_poolP; break;
- case 1:
- current_poolP = byte_poolP; break;
- default:
- as_bad (_("bad literal size\n"));
- }
- if (NULL == current_poolP)
- continue;
- sprintf (pool_name, ".LITP%01d%06d", litsize, lit_pool_num);
- symbol_locate (current_poolP, pool_name, now_seg,
- (valueT) frag_now_fix (), frag_now);
- symbol_table_insert (current_poolP);
-
- lit_count = 0;
- while (lit_count < next_literal_pool_place)
- {
- if (litsize == literals[lit_count].size)
- {
-#define EMIT_ADDR_CONS_SYMBOLS
-#ifdef EMIT_ADDR_CONS_SYMBOLS
- /* Create a bogus symbol, add it to the pool ...
- For the most part, I think this is a useless exercise,
- except that having these symbol names in the objects
- is vaguely useful for debugging. */
- if (literals[lit_count].sym_name)
- {
- symbolS * symP = symbol_make_empty ();
- symbol_locate (symP, literals[lit_count].sym_name, now_seg,
- (valueT) frag_now_fix (), frag_now);
- symbol_table_insert (symP);
- }
-#endif /* EMIT_ADDR_CONS_SYMBOLS */
-
- emit_expr (&(literals[lit_count].exp), literals[lit_count].size);
- }
- lit_count ++;
- }
- }
-
- next_literal_pool_place = 0;
- longlong_poolP = NULL;
- word_poolP = NULL;
- short_poolP = NULL;
- byte_poolP = NULL;
- lit_pool_num++;
-}
-
-#endif /* LITERAL_POOL_SUPPORT */
-
-\f
-/* Add support for the HLASM-like USING directive to indicate
- the base register to use ... we don't support the full
- hlasm semantics for this ... we merely pluck a base address
- and a register number out. We print a warning if using is
- called multiple times. I suppose we should check to see
- if the regno is valid. */
-
-static void
-i370_using (int ignore ATTRIBUTE_UNUSED)
-{
- expressionS ex, baseaddr;
- int iregno;
- char *star;
-
- /* If "*" appears in a using, it means "."
- replace it with "." so that expr doesn't get confused. */
- star = strchr (input_line_pointer, '*');
- if (star)
- *star = '.';
-
- /* The first arg to using will usually be ".", but it can
- be a more complex expression too. */
- expression (&baseaddr);
- if (star)
- *star = '*';
- if (O_constant != baseaddr.X_op
- && O_symbol != baseaddr.X_op
- && O_uminus != baseaddr.X_op)
- as_bad (_(".using: base address expression illegal or too complex"));
-
- if (*input_line_pointer != '\0') ++input_line_pointer;
-
- /* The second arg to using had better be a register. */
- register_name (&ex);
- demand_empty_rest_of_line ();
- iregno = ex.X_add_number;
-
- if (0 == strncmp (now_seg->name, ".text", 5))
- {
- i370_using_text_baseaddr = baseaddr;
- i370_using_text_regno = iregno;
- }
- else
- {
- i370_using_other_baseaddr = baseaddr;
- i370_using_other_regno = iregno;
- i370_other_section = now_seg;
- }
-}
-
-static void
-i370_drop (int ignore ATTRIBUTE_UNUSED)
-{
- expressionS ex;
- int iregno;
-
- register_name (&ex);
- demand_empty_rest_of_line ();
- iregno = ex.X_add_number;
-
- if (0 == strncmp (now_seg->name, ".text", 5))
- {
- if (iregno != i370_using_text_regno)
- as_bad (_("dropping register %d in section %s does not match using register %d"),
- iregno, now_seg->name, i370_using_text_regno);
-
- i370_using_text_regno = -1;
- i370_using_text_baseaddr.X_op = O_absent;
- }
- else
- {
- if (iregno != i370_using_other_regno)
- as_bad (_("dropping register %d in section %s does not match using register %d"),
- iregno, now_seg->name, i370_using_other_regno);
-
- if (i370_other_section != now_seg)
- as_bad (_("dropping register %d in section %s previously used in section %s"),
- iregno, now_seg->name, i370_other_section->name);
-
- i370_using_other_regno = -1;
- i370_using_other_baseaddr.X_op = O_absent;
- i370_other_section = undefined_section;
- }
-}
-
-\f
-/* We need to keep a list of fixups. We can't simply generate them as
- we go, because that would require us to first create the frag, and
- that would screw up references to ``.''. */
-
-struct i370_fixup
-{
- expressionS exp;
- int opindex;
- bfd_reloc_code_real_type reloc;
-};
-
-#define MAX_INSN_FIXUPS 5
-
-/* Handle a macro. Gather all the operands, transform them as
- described by the macro, and call md_assemble recursively. All the
- operands are separated by commas; we don't accept parentheses
- around operands here. */
-
-static void
-i370_macro (char *str, const struct i370_macro *macro)
-{
- char *operands[10];
- unsigned int count;
- char *s;
- unsigned int len;
- const char *format;
- int arg;
- char *send;
- char *complete;
-
- /* Gather the users operands into the operands array. */
- count = 0;
- s = str;
- while (1)
- {
- if (count >= sizeof operands / sizeof operands[0])
- break;
- operands[count++] = s;
- s = strchr (s, ',');
- if (s == (char *) NULL)
- break;
- *s++ = '\0';
- }
-
- if (count != macro->operands)
- {
- as_bad (_("wrong number of operands"));
- return;
- }
-
- /* Work out how large the string must be (the size is unbounded
- because it includes user input). */
- len = 0;
- format = macro->format;
- while (*format != '\0')
- {
- if (*format != '%')
- {
- ++len;
- ++format;
- }
- else
- {
- arg = strtol (format + 1, &send, 10);
- know (send != format && arg >= 0 && (unsigned) arg < count);
- len += strlen (operands[arg]);
- format = send;
- }
- }
-
- /* Put the string together. */
- complete = s = XNEWVEC (char, len + 1);
- format = macro->format;
- while (*format != '\0')
- {
- if (*format != '%')
- *s++ = *format++;
- else
- {
- arg = strtol (format + 1, &send, 10);
- strcpy (s, operands[arg]);
- s += strlen (s);
- format = send;
- }
- }
- *s = '\0';
-
- /* Assemble the constructed instruction. */
- md_assemble (complete);
- free (complete);
-}
-
-/* This routine is called for each instruction to be assembled. */
-
-void
-md_assemble (char *str)
-{
- char *s;
- const struct i370_opcode *opcode;
- i370_insn_t insn;
- const unsigned char *opindex_ptr;
- int have_optional_index, have_optional_basereg, have_optional_reg;
- int skip_optional_index, skip_optional_basereg, skip_optional_reg;
- int use_text=0, use_other=0;
- int off_by_one;
- struct i370_fixup fixups[MAX_INSN_FIXUPS];
- int fc;
- char *f;
- int i;
-#ifdef OBJ_ELF
- bfd_reloc_code_real_type reloc;
-#endif
-
- /* Get the opcode. */
- for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
- ;
- if (*s != '\0')
- *s++ = '\0';
-
- /* Look up the opcode in the hash table. */
- opcode = (const struct i370_opcode *) hash_find (i370_hash, str);
- if (opcode == (const struct i370_opcode *) NULL)
- {
- const struct i370_macro *macro;
-
- gas_assert (i370_macro_hash);
- macro = (const struct i370_macro *) hash_find (i370_macro_hash, str);
- if (macro == (const struct i370_macro *) NULL)
- as_bad (_("Unrecognized opcode: `%s'"), str);
- else
- i370_macro (s, macro);
-
- return;
- }
-
- insn = opcode->opcode;
-
- str = s;
- while (ISSPACE (*str))
- ++str;
-
- /* I370 operands are either expressions or address constants.
- Many operand types are optional. The optional operands
- are always surrounded by parens, and are used to denote the base
- register ... e.g. "A R1, D2" or "A R1, D2(,B2) as opposed to
- the fully-formed "A R1, D2(X2,B2)". Note also the = sign,
- such as A R1,=A(i) where the address-of operator =A implies
- use of both a base register, and a missing index register.
-
- So, before we start seriously parsing the operands, we check
- to see if we have an optional operand, and, if we do, we count
- the number of commas to see which operand should be omitted. */
-
- have_optional_index = have_optional_basereg = have_optional_reg = 0;
- for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
- {
- const struct i370_operand *operand;
-
- operand = &i370_operands[*opindex_ptr];
- if ((operand->flags & I370_OPERAND_INDEX) != 0)
- have_optional_index = 1;
- if ((operand->flags & I370_OPERAND_BASE) != 0)
- have_optional_basereg = 1;
- if ((operand->flags & I370_OPERAND_OPTIONAL) != 0)
- have_optional_reg = 1;
- }
-
- skip_optional_index = skip_optional_basereg = skip_optional_reg = 0;
- if (have_optional_index || have_optional_basereg)
- {
- unsigned int opcount, nwanted;
-
- /* There is an optional operand. Count the number of
- commas and open-parens in the input line. */
- if (*str == '\0')
- opcount = 0;
- else
- {
- opcount = 1;
- s = str;
- while ((s = strpbrk (s, ",(=")) != (char *) NULL)
- {
- ++opcount;
- ++s;
- if (',' == *s) ++s; /* avoid counting things like (, */
- if ('=' == *s) { ++s; --opcount; }
- }
- }
-
- /* If there are fewer operands in the line then are called
- for by the instruction, we want to skip the optional
- operand. */
- nwanted = strlen ((char *) opcode->operands);
- if (have_optional_index)
- {
- if (opcount < nwanted)
- skip_optional_index = 1;
- if (have_optional_basereg && ((opcount+1) < nwanted))
- skip_optional_basereg = 1;
- if (have_optional_reg && ((opcount+1) < nwanted))
- skip_optional_reg = 1;
- }
- else
- {
- if (have_optional_basereg && (opcount < nwanted))
- skip_optional_basereg = 1;
- if (have_optional_reg && (opcount < nwanted))
- skip_optional_reg = 1;
- }
- }
-
- /* Perform some off-by-one hacks on the length field of certain instructions.
- It's such a shame to have to do this, but the problem is that HLASM got
- defined so that the lengths differ by one from the actual machine instructions.
- this code should probably be moved to a special inter-operand routine.
- Sigh. Affected instructions are Compare Logical, Move and Exclusive OR
- hack alert -- aren't *all* SS instructions affected ?? */
- off_by_one = 0;
- if (0 == strcasecmp ("CLC", opcode->name)
- || 0 == strcasecmp ("ED", opcode->name)
- || 0 == strcasecmp ("EDMK", opcode->name)
- || 0 == strcasecmp ("MVC", opcode->name)
- || 0 == strcasecmp ("MVCIN", opcode->name)
- || 0 == strcasecmp ("MVN", opcode->name)
- || 0 == strcasecmp ("MVZ", opcode->name)
- || 0 == strcasecmp ("NC", opcode->name)
- || 0 == strcasecmp ("OC", opcode->name)
- || 0 == strcasecmp ("XC", opcode->name))
- off_by_one = 1;
-
- /* Gather the operands. */
- fc = 0;
- for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
- {
- const struct i370_operand *operand;
- char *hold;
- expressionS ex;
-
- operand = &i370_operands[*opindex_ptr];
-
- /* If this is an index operand, and we are skipping it,
- just insert a zero. */
- if (skip_optional_index &&
- ((operand->flags & I370_OPERAND_INDEX) != 0))
- {
- insn = i370_insert_operand (insn, operand, 0);
- continue;
- }
-
- /* If this is the base operand, and we are skipping it,
- just insert the current using basreg. */
- if (skip_optional_basereg &&
- ((operand->flags & I370_OPERAND_BASE) != 0))
- {
- int basereg = -1;
- if (use_text)
- {
- if (0 == strncmp (now_seg->name, ".text", 5)
- || 0 > i370_using_other_regno)
- basereg = i370_using_text_regno;
- else
- basereg = i370_using_other_regno;
- }
- else if (use_other)
- {
- if (0 > i370_using_other_regno)
- basereg = i370_using_text_regno;
- else
- basereg = i370_using_other_regno;
- }
- if (0 > basereg)
- as_bad (_("not using any base register"));
-
- insn = i370_insert_operand (insn, operand, basereg);
- continue;
- }
-
- /* If this is an optional operand, and we are skipping it,
- Use zero (since a non-zero value would denote a register) */
- if (skip_optional_reg
- && ((operand->flags & I370_OPERAND_OPTIONAL) != 0))
- {
- insn = i370_insert_operand (insn, operand, 0);
- continue;
- }
-
- /* Gather the operand. */
- hold = input_line_pointer;
- input_line_pointer = str;
-
- /* Register names are only allowed where there are registers. */
- if ((operand->flags & I370_OPERAND_GPR) != 0)
- {
- /* Quickie hack to get past things like (,r13). */
- if (skip_optional_index && (',' == *input_line_pointer))
- {
- *input_line_pointer = ' ';
- input_line_pointer ++;
- }
-
- if (! register_name (&ex))
- as_bad (_("expecting a register for operand %d"),
- (int) (opindex_ptr - opcode->operands + 1));
- }
-
- /* Check for an address constant expression. */
- /* We will put PSW-relative addresses in the text section,
- and address literals in the .data (or other) section. */
- else if (i370_addr_cons (&ex))
- use_other = 1;
- else if (i370_addr_offset (&ex))
- use_text = 1;
- else expression (&ex);
-
- str = input_line_pointer;
- input_line_pointer = hold;
-
- /* Perform some off-by-one hacks on the length field of certain instructions.
- It's such a shame to have to do this, but the problem is that HLASM got
- defined so that the programmer specifies a length that is one greater
- than what the machine instruction wants. Sigh. */
- if (off_by_one && (0 == strcasecmp ("SS L", operand->name)))
- ex.X_add_number --;
-
- if (ex.X_op == O_illegal)
- as_bad (_("illegal operand"));
- else if (ex.X_op == O_absent)
- as_bad (_("missing operand"));
- else if (ex.X_op == O_register)
- insn = i370_insert_operand (insn, operand, ex.X_add_number);
- else if (ex.X_op == O_constant)
- {
-#ifdef OBJ_ELF
- /* Allow @HA, @L, @H on constants.
- Well actually, no we don't; there really don't make sense
- (at least not to me) for the i370. However, this code is
- left here for any dubious future expansion reasons. */
- char *orig_str = str;
-
- if ((reloc = i370_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
- switch (reloc)
- {
- default:
- str = orig_str;
- break;
-
- case BFD_RELOC_LO16:
- /* X_unsigned is the default, so if the user has done
- something which cleared it, we always produce a
- signed value. */
- ex.X_add_number = (((ex.X_add_number & 0xffff)
- ^ 0x8000)
- - 0x8000);
- break;
-
- case BFD_RELOC_HI16:
- ex.X_add_number = (ex.X_add_number >> 16) & 0xffff;
- break;
-
- case BFD_RELOC_HI16_S:
- ex.X_add_number = (((ex.X_add_number >> 16) & 0xffff)
- + ((ex.X_add_number >> 15) & 1));
- break;
- }
-#endif
- insn = i370_insert_operand (insn, operand, ex.X_add_number);
- }
-#ifdef OBJ_ELF
- else if ((reloc = i370_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
- {
- as_tsktsk ("md_assemble(): suffixed relocations not supported\n");
-
- /* We need to generate a fixup for this expression. */
- if (fc >= MAX_INSN_FIXUPS)
- as_fatal ("too many fixups");
- fixups[fc].exp = ex;
- fixups[fc].opindex = 0;
- fixups[fc].reloc = reloc;
- ++fc;
- }
-#endif /* OBJ_ELF */
- else
- {
- /* We need to generate a fixup for this expression. */
- /* Typically, the expression will just be a symbol ...
- printf ("insn %s needs fixup for %s \n",
- opcode->name, ex.X_add_symbol->bsym->name); */
-
- if (fc >= MAX_INSN_FIXUPS)
- as_fatal ("too many fixups");
- fixups[fc].exp = ex;
- fixups[fc].opindex = *opindex_ptr;
- fixups[fc].reloc = BFD_RELOC_UNUSED;
- ++fc;
- }
-
- /* Skip over delimiter (close paren, or comma). */
- if ((')' == *str) && (',' == *(str+1)))
- ++str;
- if (*str != '\0')
- ++str;
- }
-
- while (ISSPACE (*str))
- ++str;
-
- if (*str != '\0')
- as_bad (_("junk at end of line: `%s'"), str);
-
- /* Write out the instruction. */
- f = frag_more (opcode->len);
- if (4 >= opcode->len)
- md_number_to_chars (f, insn.i[0], opcode->len);
- else
- {
- md_number_to_chars (f, insn.i[0], 4);
-
- if (6 == opcode->len)
- md_number_to_chars ((f + 4), ((insn.i[1])>>16), 2);
- else
- {
- /* Not used --- don't have any 8 byte instructions. */
- as_bad (_("Internal Error: bad instruction length"));
- md_number_to_chars ((f + 4), insn.i[1], opcode->len -4);
- }
- }
-
- /* Create any fixups. At this point we do not use a
- bfd_reloc_code_real_type, but instead just use the
- BFD_RELOC_UNUSED plus the operand index. This lets us easily
- handle fixups for any operand type, although that is admittedly
- not a very exciting feature. We pick a BFD reloc type in
- md_apply_fix. */
- for (i = 0; i < fc; i++)
- {
- const struct i370_operand *operand;
-
- operand = &i370_operands[fixups[i].opindex];
- if (fixups[i].reloc != BFD_RELOC_UNUSED)
- {
- reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
- int size;
- fixS *fixP;
-
- if (!reloc_howto)
- abort ();
-
- size = bfd_get_reloc_size (reloc_howto);
-
- if (size < 1 || size > 4)
- abort ();
-
- printf (" gwana do fixup %d \n", i);
- fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
- &fixups[i].exp, reloc_howto->pc_relative,
- fixups[i].reloc);
-
- /* Turn off complaints that the addend is too large for things like
- foo+100000@ha. */
- switch (fixups[i].reloc)
- {
- case BFD_RELOC_16_GOTOFF:
- case BFD_RELOC_LO16:
- case BFD_RELOC_HI16:
- case BFD_RELOC_HI16_S:
- fixP->fx_no_overflow = 1;
- break;
- default:
- break;
- }
- }
- else
- {
- fix_new_exp (frag_now, f - frag_now->fr_literal, opcode->len,
- &fixups[i].exp,
- (operand->flags & I370_OPERAND_RELATIVE) != 0,
- ((bfd_reloc_code_real_type)
- (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
- }
- }
-}
-
-\f
-/* Pseudo-op handling. */
-
-/* The .byte pseudo-op. This is similar to the normal .byte
- pseudo-op, but it can also take a single ASCII string. */
-
-static void
-i370_byte (int ignore ATTRIBUTE_UNUSED)
-{
- if (*input_line_pointer != '\"')
- {
- cons (1);
- return;
- }
-
- /* Gather characters. A real double quote is doubled. Unusual
- characters are not permitted. */
- ++input_line_pointer;
- while (1)
- {
- char c;
-
- c = *input_line_pointer++;
-
- if (c == '\"')
- {
- if (*input_line_pointer != '\"')
- break;
- ++input_line_pointer;
- }
-
- FRAG_APPEND_1_CHAR (c);
- }
-
- demand_empty_rest_of_line ();
-}
-\f
-/* The .tc pseudo-op. This is used when generating XCOFF and ELF.
- This takes two or more arguments.
-
- When generating XCOFF output, the first argument is the name to
- give to this location in the toc; this will be a symbol with class
- TC. The rest of the arguments are 4 byte values to actually put at
- this location in the TOC; often there is just one more argument, a
- relocatable symbol reference.
-
- When not generating XCOFF output, the arguments are the same, but
- the first argument is simply ignored. */
-
-static void
-i370_tc (int ignore ATTRIBUTE_UNUSED)
-{
-
- /* Skip the TOC symbol name. */
- while (is_part_of_name (*input_line_pointer)
- || *input_line_pointer == '['
- || *input_line_pointer == ']'
- || *input_line_pointer == '{'
- || *input_line_pointer == '}')
- ++input_line_pointer;
-
- /* Align to a four byte boundary. */
- frag_align (2, 0, 0);
- record_alignment (now_seg, 2);
-
- if (*input_line_pointer != ',')
- demand_empty_rest_of_line ();
- else
- {
- ++input_line_pointer;
- cons (4);
- }
-}
-\f
-const char *
-md_atof (int type, char *litp, int *sizep)
-{
- /* 360/370/390 have two float formats: an old, funky 360 single-precision
- format, and the ieee format. Support only the ieee format. */
- return ieee_md_atof (type, litp, sizep, TRUE);
-}
-
-/* Write a value out to the object file, using the appropriate
- endianness. */
-
-void
-md_number_to_chars (char *buf, valueT val, int n)
-{
- number_to_chars_bigendian (buf, val, n);
-}
-
-/* Align a section (I don't know why this is machine dependent). */
-
-valueT
-md_section_align (asection *seg, valueT addr)
-{
- int align = bfd_get_section_alignment (stdoutput, seg);
-
- return (addr + (1 << align) - 1) & -(1 << align);
-}
-
-/* We don't have any form of relaxing. */
-
-int
-md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
- asection *seg ATTRIBUTE_UNUSED)
-{
- abort ();
- return 0;
-}
-
-/* Convert a machine dependent frag. We never generate these. */
-
-void
-md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
- asection *sec ATTRIBUTE_UNUSED,
- fragS *fragp ATTRIBUTE_UNUSED)
-{
- abort ();
-}
-
-/* We have no need to default values of symbols. */
-
-symbolS *
-md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-\f
-/* Functions concerning relocs. */
-
-/* The location from which a PC relative jump should be calculated,
- given a PC relative reloc. */
-
-long
-md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
-{
- return fixp->fx_frag->fr_address + fixp->fx_where;
-}
-
-/* Apply a fixup to the object code. This is called for all the
- fixups we generated by the call to fix_new_exp, above. In the call
- above we used a reloc code which was the largest legal reloc code
- plus the operand index. Here we undo that to recover the operand
- index. At this point all symbol values should be fully resolved,
- and we attempt to completely resolve the reloc. If we can not do
- that, we determine the correct reloc code and put it back in the
- fixup.
-
- See gas/cgen.c for more sample code and explanations of what's
- going on here. */
-
-void
-md_apply_fix (fixS *fixP, valueT * valP, segT seg)
-{
- valueT value = * valP;
-
- if (fixP->fx_addsy != NULL)
- {
-#ifdef DEBUG
- printf ("\nmd_apply_fix: symbol %s at 0x%x (%s:%d) val=0x%x addend=0x%x\n",
- S_GET_NAME (fixP->fx_addsy),
- fixP->fx_frag->fr_address + fixP->fx_where,
- fixP->fx_file, fixP->fx_line,
- S_GET_VALUE (fixP->fx_addsy), value);
-#endif
- }
- else
- fixP->fx_done = 1;
-
- /* Apply fixups to operands. Note that there should be no relocations
- for any operands, since no instruction ever takes an operand
- that requires reloc. */
- if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
- {
- int opindex;
- const struct i370_operand *operand;
- char *where;
- i370_insn_t insn;
-
- opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
-
- operand = &i370_operands[opindex];
-
-#ifdef DEBUG
- printf ("\nmd_apply_fix: fixup operand %s at 0x%x in %s:%d addend=0x%x\n",
- operand->name,
- fixP->fx_frag->fr_address + fixP->fx_where,
- fixP->fx_file, fixP->fx_line,
- value);
-#endif
- /* Fetch the instruction, insert the fully resolved operand
- value, and stuff the instruction back again.
- fisxp->fx_size is the length of the instruction. */
- where = fixP->fx_frag->fr_literal + fixP->fx_where;
- insn.i[0] = bfd_getb32 ((unsigned char *) where);
-
- if (6 <= fixP->fx_size)
- /* Deal with 48-bit insn's. */
- insn.i[1] = bfd_getb32 (((unsigned char *) where)+4);
-
- insn = i370_insert_operand (insn, operand, (offsetT) value);
- bfd_putb32 ((bfd_vma) insn.i[0], (unsigned char *) where);
-
- if (6 <= fixP->fx_size)
- /* Deal with 48-bit insn's. */
- bfd_putb32 ((bfd_vma) insn.i[1], (((unsigned char *) where)+4));
-
- /* We are done, right? right !! */
- fixP->fx_done = 1;
- if (fixP->fx_done)
- /* Nothing else to do here. */
- return;
-
- /* Determine a BFD reloc value based on the operand information.
- We are only prepared to turn a few of the operands into
- relocs. In fact, we support *zero* operand relocations ...
- Why? Because we are not expecting the compiler to generate
- any operands that need relocation. Due to the 12-bit nature of
- i370 addressing, this would be unusual. */
- {
- const char *sfile;
- unsigned int sline;
-
- /* Use expr_symbol_where to see if this is an expression
- symbol. */
- if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "unresolved expression that must be resolved");
- else
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "unsupported relocation type");
- fixP->fx_done = 1;
- return;
- }
- }
- else
- {
- /* We branch to here if the fixup is not to a symbol that
- appears in an instruction operand, but is rather some
- declared storage. */
-#ifdef OBJ_ELF
- i370_elf_validate_fix (fixP, seg);
-#endif
-#ifdef DEBUG
- printf ("md_apply_fix: reloc case %d in segment %s %s:%d\n",
- fixP->fx_r_type, segment_name (seg), fixP->fx_file, fixP->fx_line);
- printf ("\tcurrent fixup value is 0x%x \n", value);
-#endif
- switch (fixP->fx_r_type)
- {
- case BFD_RELOC_32:
- case BFD_RELOC_CTOR:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_32_PCREL;
- /* Fall through. */
-
- case BFD_RELOC_RVA:
- case BFD_RELOC_32_PCREL:
- case BFD_RELOC_32_BASEREL:
-#ifdef DEBUG
- printf ("\t32 bit relocation at 0x%x\n",
- fixP->fx_frag->fr_address + fixP->fx_where);
-#endif
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 4);
- break;
-
- case BFD_RELOC_LO16:
- case BFD_RELOC_16:
- if (fixP->fx_pcrel)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "cannot emit PC relative %s relocation%s%s",
- bfd_get_reloc_code_name (fixP->fx_r_type),
- fixP->fx_addsy != NULL ? " against " : "",
- (fixP->fx_addsy != NULL
- ? S_GET_NAME (fixP->fx_addsy)
- : ""));
-
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 2);
- break;
-
- /* This case happens when you write, for example,
- lis %r3,(L1-L2)@ha
- where L1 and L2 are defined later. */
- case BFD_RELOC_HI16:
- if (fixP->fx_pcrel)
- abort ();
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value >> 16, 2);
- break;
- case BFD_RELOC_HI16_S:
- if (fixP->fx_pcrel)
- abort ();
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- (value + 0x8000) >> 16, 2);
- break;
-
- case BFD_RELOC_8:
- if (fixP->fx_pcrel)
- abort ();
-
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 1);
- break;
-
- default:
- fprintf (stderr,
- "Gas failure, reloc value %d\n", fixP->fx_r_type);
- fflush (stderr);
- abort ();
- }
- }
-
- fixP->fx_addnumber = value;
-}
-
-/* Generate a reloc for a fixup. */
-
-arelent *
-tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
-{
- arelent *reloc;
-
- reloc = XNEW (arelent);
-
- reloc->sym_ptr_ptr = XNEW (asymbol *);
- *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
- reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
- reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
- if (reloc->howto == (reloc_howto_type *) NULL)
- {
- as_bad_where (fixp->fx_file, fixp->fx_line,
- "reloc %d not supported by object file format", (int)fixp->fx_r_type);
- return NULL;
- }
- reloc->addend = fixp->fx_addnumber;
-
-#ifdef DEBUG
- printf ("\ngen_reloc(): sym %s (%s:%d) at addr 0x%x addend=0x%x\n",
- fixp->fx_addsy->bsym->name,
- fixp->fx_file, fixp->fx_line,
- reloc->address, reloc->addend);
-#endif
-
- return reloc;
-}
-
-/* The target specific pseudo-ops which we support. */
-
-const pseudo_typeS md_pseudo_table[] =
-{
- /* Pseudo-ops which must be overridden. */
- { "byte", i370_byte, 0 },
-
- { "dc", i370_dc, 0 },
- { "ds", i370_ds, 0 },
- { "rmode", i370_rmode, 0 },
- { "csect", i370_csect, 0 },
- { "dsect", i370_dsect, 0 },
-
- /* enable ebcdic strings e.g. for 3270 support */
- { "ebcdic", i370_ebcdic, 0 },
-
-#ifdef OBJ_ELF
- { "long", i370_elf_cons, 4 },
- { "word", i370_elf_cons, 4 },
- { "short", i370_elf_cons, 2 },
- { "rdata", i370_elf_rdata, 0 },
- { "rodata", i370_elf_rdata, 0 },
- { "lcomm", i370_elf_lcomm, 0 },
-#endif
-
- /* This pseudo-op is used even when not generating XCOFF output. */
- { "tc", i370_tc, 0 },
-
- /* dump the literal pool */
- { "ltorg", i370_ltorg, 0 },
-
- /* support the hlasm-style USING directive */
- { "using", i370_using, 0 },
- { "drop", i370_drop, 0 },
-
- { NULL, NULL, 0 }
-};
+++ /dev/null
-/* tc-i370.h -- Header file for tc-i370.c.
- Copyright (C) 1994-2018 Free Software Foundation, Inc.
- Written by Ian Lance Taylor, Cygnus Support.
-
- This file is part of GAS, the GNU Assembler.
-
- GAS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- GAS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to the Free
- Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
- 02110-1301, USA. */
-
-#define TC_I370
-
-struct fix;
-
-/* Set the endianness we are using. Default to big endian. */
-#ifndef TARGET_BYTES_BIG_ENDIAN
-#define TARGET_BYTES_BIG_ENDIAN 1
-#endif
-
-/* The target BFD architecture. */
-#define TARGET_ARCH (i370_arch ())
-extern enum bfd_architecture i370_arch (void);
-
-/* Whether or not the target is big endian. */
-extern int target_big_endian;
-
-/* The target BFD format. */
-#define TARGET_FORMAT ("elf32-i370")
-
-/* Permit temporary numeric labels. */
-#define LOCAL_LABELS_FB 1
-
-/* $ is used to refer to the current location. */
-/* #define DOLLAR_DOT */
-
-/* foo-. gets turned into PC relative relocs. */
-#define DIFF_EXPR_OK
-
-/* Values passed to md_apply_fix don't include the symbol value. */
-#define MD_APPLY_SYM_VALUE(FIX) 0
-
-/* We don't need to handle .word strangely. */
-#define WORKING_DOT_WORD
-
-/* Call md_pcrel_from_section, not md_pcrel_from. */
-#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
-extern long md_pcrel_from_section (struct fix *, segT);
-
-#define md_operand(x)
-
-#define tc_comment_chars i370_comment_chars
-extern const char *i370_comment_chars;
h8300-*-elf) fmt=elf ;;
h8300-*-linux*) fmt=elf em=linux ;;
- i370-*-elf* | i370-*-linux*) fmt=elf ;;
-
i386-ibm-aix*) fmt=coff em=i386aix ;;
i386-sequent-bsd*) fmt=aout em=dynix ;;
i386-*-beospe*) fmt=coff em=pe ;;
c-epiphany.texi \
c-h8300.texi \
c-hppa.texi \
- c-i370.texi \
c-i386.texi \
c-ip2k.texi \
c-lm32.texi \
c-epiphany.texi \
c-h8300.texi \
c-hppa.texi \
- c-i370.texi \
c-i386.texi \
c-ip2k.texi \
c-lm32.texi \
@ifset HPPA
* HPPA-Dependent:: HPPA Dependent Features
@end ifset
-@ifset I370
-* ESA/390-Dependent:: IBM ESA/390 Dependent Features
-@end ifset
@ifset I80386
* i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features
@end ifset
@include c-hppa.texi
@end ifset
-@ifset I370
-@include c-i370.texi
-@end ifset
-
@ifset I80386
@include c-i386.texi
@end ifset
+++ /dev/null
-@c Copyright (C) 2000-2018 Free Software Foundation, Inc.
-@c This is part of the GAS manual.
-@c For copying conditions, see the file as.texinfo.
-@ifset GENERIC
-@page
-@node ESA/390-Dependent
-@chapter ESA/390 Dependent Features
-@end ifset
-@ifclear GENERIC
-@node Machine Dependencies
-@chapter ESA/390 Dependent Features
-@end ifclear
-
-@cindex i370 support
-@cindex ESA/390 support
-
-@menu
-* ESA/390 Notes:: Notes
-* ESA/390 Options:: Options
-* ESA/390 Syntax:: Syntax
-* ESA/390 Floating Point:: Floating Point
-* ESA/390 Directives:: ESA/390 Machine Directives
-* ESA/390 Opcodes:: Opcodes
-@end menu
-
-@node ESA/390 Notes
-@section Notes
-The ESA/390 @code{@value{AS}} port is currently intended to be a back-end
-for the @sc{gnu} @sc{cc} compiler. It is not HLASM compatible, although
-it does support a subset of some of the HLASM directives. The only
-supported binary file format is ELF; none of the usual MVS/VM/OE/USS
-object file formats, such as ESD or XSD, are supported.
-
-When used with the @sc{gnu} @sc{cc} compiler, the ESA/390 @code{@value{AS}}
-will produce correct, fully relocated, functional binaries, and has been
-used to compile and execute large projects. However, many aspects should
-still be considered experimental; these include shared library support,
-dynamically loadable objects, and any relocation other than the 31-bit
-relocation.
-
-@node ESA/390 Options
-@section Options
-@code{@value{AS}} has no machine-dependent command-line options for the ESA/390.
-
-@cindex ESA/390 Syntax
-@node ESA/390 Syntax
-@section Syntax
-The opcode/operand syntax follows the ESA/390 Principles of Operation
-manual; assembler directives and general syntax are loosely based on the
-prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives
-are @emph{not} supported for the most part, with the exception of those
-described herein.
-
-A leading dot in front of directives is optional, and the case of
-directives is ignored; thus for example, .using and USING have the same
-effect.
-
-A colon may immediately follow a label definition. This is
-simply for compatibility with how most assembly language programmers
-write code.
-
-@samp{#} is the line comment character.
-
-@samp{;} can be used instead of a newline to separate statements.
-
-Since @samp{$} has no special meaning, you may use it in symbol names.
-
-Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, fp6.
-By using these symbolic names, @code{@value{AS}} can detect simple
-syntax errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca
-for r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
-for r3 and rpgt or r.pgt for r4.
-
-@samp{*} is the current location counter. Unlike @samp{.} it is always
-relative to the last USING directive. Note that this means that
-expressions cannot use multiplication, as any occurrence of @samp{*}
-will be interpreted as a location counter.
-
-All labels are relative to the last USING. Thus, branches to a label
-always imply the use of base+displacement.
-
-Many of the usual forms of address constants / address literals
-are supported. Thus,
-@example
- .using *,r3
- L r15,=A(some_routine)
- LM r6,r7,=V(some_longlong_extern)
- A r1,=F'12'
- AH r0,=H'42'
- ME r6,=E'3.1416'
- MD r6,=D'3.14159265358979'
- O r6,=XL4'cacad0d0'
- .ltorg
-@end example
-should all behave as expected: that is, an entry in the literal
-pool will be created (or reused if it already exists), and the
-instruction operands will be the displacement into the literal pool
-using the current base register (as last declared with the @code{.using}
-directive).
-
-@node ESA/390 Floating Point
-@section Floating Point
-@cindex floating point, ESA/390 (@sc{ieee})
-@cindex ESA/390 floating point (@sc{ieee})
-The assembler generates only @sc{ieee} floating-point numbers. The older
-floating point formats are not supported.
-
-
-@node ESA/390 Directives
-@section ESA/390 Assembler Directives
-
-@code{@value{AS}} for the ESA/390 supports all of the standard ELF/SVR4
-assembler directives that are documented in the main part of this
-documentation. Several additional directives are supported in order
-to implement the ESA/390 addressing model. The most important of these
-are @code{.using} and @code{.ltorg}
-
-@cindex ESA/390-only directives
-These are the additional directives in @code{@value{AS}} for the ESA/390:
-
-@table @code
-@item .dc
-A small subset of the usual DC directive is supported.
-
-@item .drop @var{regno}
-Stop using @var{regno} as the base register. The @var{regno} must
-have been previously declared with a @code{.using} directive in the
-same section as the current section.
-
-@item .ebcdic @var{string}
-Emit the EBCDIC equivalent of the indicated string. The emitted string
-will be null terminated. Note that the directives @code{.string} etc. emit
-ascii strings by default.
-
-@item EQU
-The standard HLASM-style EQU directive is not supported; however, the
-standard @code{@value{AS}} directive .equ can be used to the same effect.
-
-@item .ltorg
-Dump the literal pool accumulated so far; begin a new literal pool.
-The literal pool will be written in the current section; in order to
-generate correct assembly, a @code{.using} must have been previously
-specified in the same section.
-
-@item .using @var{expr},@var{regno}
-Use @var{regno} as the base register for all subsequent RX, RS, and SS form
-instructions. The @var{expr} will be evaluated to obtain the base address;
-usually, @var{expr} will merely be @samp{*}.
-
-This assembler allows two @code{.using} directives to be simultaneously
-outstanding, one in the @code{.text} section, and one in another section
-(typically, the @code{.data} section). This feature allows
-dynamically loaded objects to be implemented in a relatively
-straightforward way. A @code{.using} directive must always be specified
-in the @code{.text} section; this will specify the base register that
-will be used for branches in the @code{.text} section. A second
-@code{.using} may be specified in another section; this will specify
-the base register that is used for non-label address literals.
-When a second @code{.using} is specified, then the subsequent
-@code{.ltorg} must be put in the same section; otherwise an error will
-result.
-
-Thus, for example, the following code uses @code{r3} to address branch
-targets and @code{r4} to address the literal pool, which has been written
-to the @code{.data} section. The is, the constants @code{=A(some_routine)},
-@code{=H'42'} and @code{=E'3.1416'} will all appear in the @code{.data}
-section.
-
-@example
-.data
- .using LITPOOL,r4
-.text
- BASR r3,0
- .using *,r3
- B START
- .long LITPOOL
-START:
- L r4,4(,r3)
- L r15,=A(some_routine)
- LTR r15,r15
- BNE LABEL
- AH r0,=H'42'
-LABEL:
- ME r6,=E'3.1416'
-.data
-LITPOOL:
- .ltorg
-@end example
-
-
-Note that this dual-@code{.using} directive semantics extends
-and is not compatible with HLASM semantics. Note that this assembler
-directive does not support the full range of HLASM semantics.
-
-@end table
-
-@node ESA/390 Opcodes
-@section Opcodes
-For detailed information on the ESA/390 machine instruction set, see
-@cite{ESA/390 Principles of Operation} (IBM Publication Number DZ9AR004).
config/tc-h8300.h
config/tc-hppa.c
config/tc-hppa.h
-config/tc-i370.c
-config/tc-i370.h
config/tc-i386.c
config/tc-i386.h
config/tc-ia64.c
{ "mmix-*-*" } {
set nop_type 5
}
- { "i370-*-*" } {
- set nop_type 3
- }
{ "or1k*-*-*" } {
set nop_type 2
}
;# { dg-options "--gdwarf2 --defsym nop_type=0" }
;# { dg-options "--gdwarf2 --defsym nop_type=1" { target ia64-*-* } }
;# { dg-options "--gdwarf2 --defsym nop_type=2" { target or1k*-*-* } }
-;# { dg-options "--gdwarf2 --defsym nop_type=3" { target i370-*-* } }
.offset 40
.ifeq nop_type - 2
l.nop 0
.else
- .ifeq nop_type - 3
- nopr 1
- .else
nop
.endif
.endif
- .endif
-;# { dg-warning "Warning: dwarf line number information for .* ignored" "" { xfail i370-*-* v850*-*-* } 0 }
+;# { dg-warning "Warning: dwarf line number information for .* ignored" "" { xfail v850*-*-* } 0 }
# ??? Won't work on targets that don't have a bare "nop" insn.
# Perhaps we could arrange for an include file or something that
# defined a macro...
-if {
- ![istarget i370-*-*]
- && ![istarget s390*-*-*]
-} {
+if { ![istarget s390*-*-*] } {
# Use alternate file for targets using DW_LNS_fixed_advance_pc opcodes.
if { [istarget am3*-*-*]
|| [istarget avr*-*-*]
2018-04-16 Alan Modra <amodra@gmail.com>
+ * elf/i370.h: Delete.
+ * opcode/i370.h: Delete.
+
+2018-04-16 Alan Modra <amodra@gmail.com>
+
* coff/h8500.h: Delete.
* coff/internal.h: Remove h8500 support.
+++ /dev/null
-/* i370 ELF support for BFD.
- Copyright (C) 2000-2018 Free Software Foundation, Inc.
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-/* This file holds definitions specific to the i370 ELF ABI. Note
- that most of this is not actually implemented by BFD. */
-
-#ifndef _ELF_I370_H
-#define _ELF_I370_H
-
-#include "elf/reloc-macros.h"
-
-/* Processor specific section headers, sh_type field */
-
-#define SHT_ORDERED SHT_HIPROC /* Link editor is to sort the \
- entries in this section \
- based on the address \
- specified in the associated \
- symbol table entry. */
-
-#define EF_I370_RELOCATABLE 0x00010000 /* i370 -mrelocatable flag */
-#define EF_I370_RELOCATABLE_LIB 0x00008000 /* i370 -mrelocatable-lib flag */
-
-/* i370 relocations
- Note that there is really just one relocation that we currently
- support (and only one that we seem to need, at the moment), and
- that is the 31-bit address relocation. Note that the 370/390
- only supports a 31-bit (2GB) address space. */
-
-START_RELOC_NUMBERS (i370_reloc_type)
- RELOC_NUMBER (R_I370_NONE, 0)
- RELOC_NUMBER (R_I370_ADDR31, 1)
- RELOC_NUMBER (R_I370_ADDR32, 2)
- RELOC_NUMBER (R_I370_ADDR16, 3)
- RELOC_NUMBER (R_I370_REL31, 4)
- RELOC_NUMBER (R_I370_REL32, 5)
- RELOC_NUMBER (R_I370_ADDR12, 6)
- RELOC_NUMBER (R_I370_REL12, 7)
- RELOC_NUMBER (R_I370_ADDR8, 8)
- RELOC_NUMBER (R_I370_REL8, 9)
- RELOC_NUMBER (R_I370_COPY, 10)
- RELOC_NUMBER (R_I370_RELATIVE, 11)
-END_RELOC_NUMBERS (R_I370_max)
-
-#endif /* _ELF_I370_H */
+++ /dev/null
-/* i370.h -- Header file for S/390 opcode table
- Copyright (C) 1994-2018 Free Software Foundation, Inc.
- PowerPC version written by Ian Lance Taylor, Cygnus Support
- Rewritten for i370 ESA/390 support, Linas Vepstas <linas@linas.org>
-
- This file is part of GDB, GAS, and the GNU binutils.
-
- GDB, GAS, and the GNU binutils are free software; you can redistribute
- them and/or modify them under the terms of the GNU General Public
- License as published by the Free Software Foundation; either version 3,
- or (at your option) any later version.
-
- GDB, GAS, and the GNU binutils are distributed in the hope that they
- will be useful, but WITHOUT ANY WARRANTY; without even the implied
- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
- the GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this file; see the file COPYING3. If not, write to the Free
- Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-#ifndef I370_H
-#define I370_H
-
-/* The opcode table is an array of struct i370_opcode. */
-typedef union
-{
- unsigned int i[2];
- unsigned short s[4];
- unsigned char b[8];
-} i370_insn_t;
-
-struct i370_opcode
-{
- /* The opcode name. */
- const char *name;
-
- /* the length of the instruction */
- char len;
-
- /* The opcode itself. Those bits which will be filled in with
- operands are zeroes. */
- i370_insn_t opcode;
-
- /* The opcode mask. This is used by the disassembler. This is a
- mask containing ones indicating those bits which must match the
- opcode field, and zeroes indicating those bits which need not
- match (and are presumably filled in by operands). */
- i370_insn_t mask;
-
- /* One bit flags for the opcode. These are used to indicate which
- specific processors support the instructions. The defined values
- are listed below. */
- unsigned long flags;
-
- /* An array of operand codes. Each code is an index into the
- operand table. They appear in the order which the operands must
- appear in assembly code, and are terminated by a zero. */
- unsigned char operands[8];
-};
-
-/* The table itself is sorted by major opcode number, and is otherwise
- in the order in which the disassembler should consider
- instructions. */
-extern const struct i370_opcode i370_opcodes[];
-extern const int i370_num_opcodes;
-
-/* Values defined for the flags field of a struct i370_opcode. */
-
-/* Opcode is defined for the original 360 architecture. */
-#define I370_OPCODE_360 (0x01)
-
-/* Opcode is defined for the 370 architecture. */
-#define I370_OPCODE_370 (0x02)
-
-/* Opcode is defined for the 370-XA architecture. */
-#define I370_OPCODE_370_XA (0x04)
-
-/* Opcode is defined for the ESA/370 architecture. */
-#define I370_OPCODE_ESA370 (0x08)
-
-/* Opcode is defined for the ESA/390 architecture. */
-#define I370_OPCODE_ESA390 (0x10)
-
-/* Opcode is defined for the ESA/390 w/ BFP facility. */
-#define I370_OPCODE_ESA390_BF (0x20)
-
-/* Opcode is defined for the ESA/390 w/ branch & set authority facility. */
-#define I370_OPCODE_ESA390_BS (0x40)
-
-/* Opcode is defined for the ESA/390 w/ checksum facility. */
-#define I370_OPCODE_ESA390_CK (0x80)
-
-/* Opcode is defined for the ESA/390 w/ compare & move extended facility. */
-#define I370_OPCODE_ESA390_CM (0x100)
-
-/* Opcode is defined for the ESA/390 w/ flt.pt. support extensions facility. */
-#define I370_OPCODE_ESA390_FX (0x200)
-
-/* Opcode is defined for the ESA/390 w/ HFP facility. */
-#define I370_OPCODE_ESA390_HX (0x400)
-
-/* Opcode is defined for the ESA/390 w/ immediate & relative facility. */
-#define I370_OPCODE_ESA390_IR (0x800)
-
-/* Opcode is defined for the ESA/390 w/ move-inverse facility. */
-#define I370_OPCODE_ESA390_MI (0x1000)
-
-/* Opcode is defined for the ESA/390 w/ program-call-fast facility. */
-#define I370_OPCODE_ESA390_PC (0x2000)
-
-/* Opcode is defined for the ESA/390 w/ perform-locked-op facility. */
-#define I370_OPCODE_ESA390_PL (0x4000)
-
-/* Opcode is defined for the ESA/390 w/ square-root facility. */
-#define I370_OPCODE_ESA390_QR (0x8000)
-
-/* Opcode is defined for the ESA/390 w/ resume-program facility. */
-#define I370_OPCODE_ESA390_RP (0x10000)
-
-/* Opcode is defined for the ESA/390 w/ set-address-space-fast facility. */
-#define I370_OPCODE_ESA390_SA (0x20000)
-
-/* Opcode is defined for the ESA/390 w/ subspace group facility. */
-#define I370_OPCODE_ESA390_SG (0x40000)
-
-/* Opcode is defined for the ESA/390 w/ string facility. */
-#define I370_OPCODE_ESA390_SR (0x80000)
-
-/* Opcode is defined for the ESA/390 w/ trap facility. */
-#define I370_OPCODE_ESA390_TR (0x100000)
-
-#define I370_OPCODE_ESA390_SUPERSET (0x1fffff)
-
-\f
-/* The operands table is an array of struct i370_operand. */
-
-struct i370_operand
-{
- /* The number of bits in the operand. */
- int bits;
-
- /* How far the operand is left shifted in the instruction. */
- int shift;
-
- /* Insertion function. This is used by the assembler. To insert an
- operand value into an instruction, check this field.
-
- If it is NULL, execute
- i |= (op & ((1 << o->bits) - 1)) << o->shift;
- (i is the instruction which we are filling in, o is a pointer to
- this structure, and op is the opcode value; this assumes twos
- complement arithmetic).
-
- If this field is not NULL, then simply call it with the
- instruction and the operand value. It will return the new value
- of the instruction. If the ERRMSG argument is not NULL, then if
- the operand value is illegal, *ERRMSG will be set to a warning
- string (the operand will be inserted in any case). If the
- operand value is legal, *ERRMSG will be unchanged (most operands
- can accept any value). */
- i370_insn_t (*insert)
- (i370_insn_t instruction, long op, const char **errmsg);
-
- /* Extraction function. This is used by the disassembler. To
- extract this operand type from an instruction, check this field.
-
- If it is NULL, compute
- op = ((i) >> o->shift) & ((1 << o->bits) - 1);
- if ((o->flags & I370_OPERAND_SIGNED) != 0
- && (op & (1 << (o->bits - 1))) != 0)
- op -= 1 << o->bits;
- (i is the instruction, o is a pointer to this structure, and op
- is the result; this assumes twos complement arithmetic).
-
- If this field is not NULL, then simply call it with the
- instruction value. It will return the value of the operand. If
- the INVALID argument is not NULL, *INVALID will be set to
- non-zero if this operand type can not actually be extracted from
- this operand (i.e., the instruction does not match). If the
- operand is valid, *INVALID will not be changed. */
- long (*extract) (i370_insn_t instruction, int *invalid);
-
- /* One bit syntax flags. */
- unsigned long flags;
-
- /* name -- handy for debugging, otherwise pointless */
- char * name;
-};
-
-/* Elements in the table are retrieved by indexing with values from
- the operands field of the i370_opcodes table. */
-
-extern const struct i370_operand i370_operands[];
-
-/* Values defined for the flags field of a struct i370_operand. */
-
-/* This operand should be wrapped in parentheses rather than
- separated from the previous by a comma. This is used for S, RS and
- SS form instructions which want their operands to look like
- reg,displacement(basereg) */
-#define I370_OPERAND_SBASE (0x01)
-
-/* This operand is a base register. It may or may not appear next
- to an index register, i.e. either of the two forms
- reg,displacement(basereg)
- reg,displacement(index,basereg) */
-#define I370_OPERAND_BASE (0x02)
-
-/* This pair of operands should be wrapped in parentheses rather than
- separated from the last by a comma. This is used for the RX form
- instructions which want their operands to look like
- reg,displacement(index,basereg) */
-#define I370_OPERAND_INDEX (0x04)
-
-/* This operand names a register. The disassembler uses this to print
- register names with a leading 'r'. */
-#define I370_OPERAND_GPR (0x08)
-
-/* This operand names a floating point register. The disassembler
- prints these with a leading 'f'. */
-#define I370_OPERAND_FPR (0x10)
-
-/* This operand is a displacement. */
-#define I370_OPERAND_RELATIVE (0x20)
-
-/* This operand is a length, such as that in SS form instructions. */
-#define I370_OPERAND_LENGTH (0x40)
-
-/* This operand is optional, and is zero if omitted. This is used for
- the optional B2 field in the shift-left, shift-right instructions. The
- assembler must count the number of operands remaining on the line,
- and the number of operands remaining for the opcode, and decide
- whether this operand is present or not. The disassembler should
- print this operand out only if it is not zero. */
-#define I370_OPERAND_OPTIONAL (0x80)
-
-\f
-/* Define some misc macros. We keep them with the operands table
- for simplicity. The macro table is an array of struct i370_macro. */
-
-struct i370_macro
-{
- /* The macro name. */
- const char *name;
-
- /* The number of operands the macro takes. */
- unsigned int operands;
-
- /* One bit flags for the opcode. These are used to indicate which
- specific processors support the instructions. The values are the
- same as those for the struct i370_opcode flags field. */
- unsigned long flags;
-
- /* A format string to turn the macro into a normal instruction.
- Each %N in the string is replaced with operand number N (zero
- based). */
- const char *format;
-};
-
-extern const struct i370_macro i370_macros[];
-extern const int i370_num_macros;
-
-
-#endif /* I370_H */
2018-04-16 Alan Modra <amodra@gmail.com>
+ * Makefile.am: Remove i370 support.
+ * configure.tgt: Likewise.
+ * testsuite/ld-elf/compressed1d.d: Likewise.
+ * testsuite/ld-elf/group8a.d: Likewise.
+ * testsuite/ld-elf/group8b.d: Likewise.
+ * testsuite/ld-elf/group9a.d: Likewise.
+ * testsuite/ld-elf/group9b.d: Likewise.
+ * testsuite/ld-elf/merge.d: Likewise.
+ * testsuite/ld-elf/pr12851.d: Likewise.
+ * testsuite/ld-elf/pr12975.d: Likewise.
+ * testsuite/ld-elf/pr13177.d: Likewise.
+ * testsuite/ld-elf/pr13195.d: Likewise.
+ * testsuite/ld-elf/pr17615.d: Likewise.
+ * testsuite/ld-elf/pr21562a.d: Likewise.
+ * testsuite/ld-elf/pr21562b.d: Likewise.
+ * testsuite/ld-elf/pr21562c.d: Likewise.
+ * testsuite/ld-elf/pr21562d.d: Likewise.
+ * testsuite/ld-elf/pr21562i.d: Likewise.
+ * testsuite/ld-elf/pr21562j.d: Likewise.
+ * testsuite/ld-elf/pr21562k.d: Likewise.
+ * testsuite/ld-elf/pr21562l.d: Likewise.
+ * testsuite/ld-elf/pr21562m.d: Likewise.
+ * testsuite/ld-elf/pr21562n.d: Likewise.
+ * testsuite/ld-elf/pr22677.d: Likewise.
+ * testsuite/lib/ld-lib.exp: Likewise.
+ * emulparams/elf32i370.sh: Delete.
+ * scripttempl/elfi370.sc: Delete.
+ * Makefile.in: Regenerate.
+ * po/BLD-POTFILES.in: Regenerate.
+
+2018-04-16 Alan Modra <amodra@gmail.com>
+
* Makefile.am: Remove h8500 support.
* configure.tgt: Likewise.
* emulparams/h8500.sh: Delete.
eelf32frv.c \
eelf32frvfd.c \
eelf32ft32.c \
- eelf32i370.c \
eelf32ip2k.c \
eelf32iq10.c \
eelf32iq2000.c \
eelf32ft32.c: $(srcdir)/emulparams/elf32ft32.sh \
$(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-eelf32i370.c: $(srcdir)/emulparams/elf32i370.sh \
- $(ELF_DEPS) $(srcdir)/scripttempl/elfi370.sc ${GEN_DEPENDS}
-
eelf32ip2k.c: $(srcdir)/emulparams/elf32ip2k.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eelf32frv.c \
eelf32frvfd.c \
eelf32ft32.c \
- eelf32i370.c \
eelf32ip2k.c \
eelf32iq10.c \
eelf32iq2000.c \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32frv.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32frvfd.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ft32.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32i370.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ip2k.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq10.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq2000.Po@am__quote@
eelf32ft32.c: $(srcdir)/emulparams/elf32ft32.sh \
$(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-eelf32i370.c: $(srcdir)/emulparams/elf32i370.sh \
- $(ELF_DEPS) $(srcdir)/scripttempl/elfi370.sc ${GEN_DEPENDS}
-
eelf32ip2k.c: $(srcdir)/emulparams/elf32ip2k.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
hppa*-*-netbsd*) targ_emul=hppanbsd ;;
hppa*-*-openbsd*) targ_emul=hppaobsd
;;
-i370-*-elf* | i370-*-linux-*) targ_emul=elf32i370
- ;;
i[3-7]86-*-nto-qnx*) targ_emul=i386nto ;;
i[3-7]86-*-vsta) targ_emul=vsta ;;
i[3-7]86-*-go32) targ_emul=i386go32 ;;
+++ /dev/null
-TEMPLATE_NAME=elf32
-GENERATE_SHLIB_SCRIPT=yes
-SCRIPT_NAME=elfi370
-OUTPUT_FORMAT="elf32-i370"
-TEXT_START_ADDR=0x01800000
-MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
-ARCH=i370
-MACHINE=
eelf32frv.c
eelf32frvfd.c
eelf32ft32.c
-eelf32i370.c
eelf32ip2k.c
eelf32iq10.c
eelf32iq2000.c
+++ /dev/null
-# Copyright (C) 2014-2018 Free Software Foundation, Inc.
-#
-# Copying and distribution of this file, with or without modification,
-# are permitted in any medium without royalty provided the copyright
-# notice and this notice are preserved.
-#
-# This is just a raw copy of elfppc.sc and has not been otherwise modified
-#
-# Unusual variables checked by this code:
-# NOP - four byte opcode for no-op (defaults to 0)
-# DATA_ADDR - if end-of-text-plus-one-page isn't right for data start
-# OTHER_READONLY_SECTIONS - other than .text .init .rodata ...
-# (e.g., .PARISC.milli)
-# OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ...
-# (e.g., .PARISC.global)
-# ATTRS_SECTIONS - at the end
-# OTHER_SECTIONS - at the end
-# EXECUTABLE_SYMBOLS - symbols that must be defined for an
-# executable (e.g., _DYNAMIC_LINK)
-# TEXT_START_SYMBOLS - symbols that appear at the start of the
-# .text section.
-# DATA_START_SYMBOLS - symbols that appear at the start of the
-# .data section.
-# OTHER_BSS_SYMBOLS - symbols that appear at the start of the
-# .bss section besides __bss_start.
-#
-# When adding sections, do note that the names of some sections are used
-# when specifying the start address of the next.
-
-test -z "$ENTRY" && ENTRY=_start
-test -z "${BIG_OUTPUT_FORMAT}" && BIG_OUTPUT_FORMAT=${OUTPUT_FORMAT}
-test -z "${LITTLE_OUTPUT_FORMAT}" && LITTLE_OUTPUT_FORMAT=${OUTPUT_FORMAT}
-test -z "$ATTRS_SECTIONS" && ATTRS_SECTIONS=".gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }"
-test "$LD_FLAG" = "N" && DATA_ADDR=.
-SBSS2=".sbss2 ${RELOCATING-0} : { *(.sbss2) }"
-SDATA2=".sdata2 ${RELOCATING-0} : { *(.sdata2) }"
-INTERP=".interp ${RELOCATING-0} : { *(.interp) }"
-PLT=".plt ${RELOCATING-0} : { *(.plt) }"
-
-cat <<EOF
-/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
-
- Copying and distribution of this script, with or without modification,
- are permitted in any medium without royalty provided the copyright
- notice and this notice are preserved. */
-
-OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
- "${LITTLE_OUTPUT_FORMAT}")
-OUTPUT_ARCH(${ARCH})
-${RELOCATING+ENTRY(${ENTRY})}
-
-${RELOCATING+${LIB_SEARCH_DIRS}}
-${RELOCATING+/* Do we need any of these for elf?
- __DYNAMIC = 0; ${STACKZERO+${STACKZERO}} ${SHLIB_PATH+${SHLIB_PATH}} */}
-${RELOCATING+${EXECUTABLE_SYMBOLS}}
-${RELOCATING- /* For some reason, the Solaris linker makes bad executables
- if gld -r is used and the intermediate file has sections starting
- at non-zero addresses. Could be a Solaris ld bug, could be a GNU ld
- bug. But for now assigning the zero vmas works. */}
-
-${RELOCATING+PROVIDE (__stack = 0);}
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- ${CREATE_SHLIB-${RELOCATING+. = ${TEXT_START_ADDR} + SIZEOF_HEADERS;}}
- ${CREATE_SHLIB+${RELOCATING+. = SIZEOF_HEADERS;}}
- ${CREATE_SHLIB-${INTERP}}
- .hash ${RELOCATING-0} : { *(.hash) }
- .dynsym ${RELOCATING-0} : { *(.dynsym) }
- .dynstr ${RELOCATING-0} : { *(.dynstr) }
- .gnu.version ${RELOCATING-0} : { *(.gnu.version) }
- .gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) }
- .gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) }
- .rela.text ${RELOCATING-0} :
- { *(.rela.text) *(.rela.gnu.linkonce.t*) }
- .rela.data ${RELOCATING-0} :
- { *(.rela.data) *(.rela.gnu.linkonce.d*) }
- .rela.rodata ${RELOCATING-0} :
- { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
- .rela.got ${RELOCATING-0} : { *(.rela.got) }
- .rela.got1 ${RELOCATING-0} : { *(.rela.got1) }
- .rela.got2 ${RELOCATING-0} : { *(.rela.got2) }
- .rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
- .rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
- .rela.init ${RELOCATING-0} : { *(.rela.init) }
- .rela.fini ${RELOCATING-0} : { *(.rela.fini) }
- .rela.bss ${RELOCATING-0} : { *(.rela.bss) }
- .rela.plt ${RELOCATING-0} : { *(.rela.plt) }
- .rela.sdata ${RELOCATING-0} : { *(.rela.sdata) }
- .rela.sbss ${RELOCATING-0} : { *(.rela.sbss) }
- .rela.sdata2 ${RELOCATING-0} : { *(.rela.sdata2) }
- .rela.sbss2 ${RELOCATING-0} : { *(.rela.sbss2) }
- .text ${RELOCATING-0} :
- {
- ${RELOCATING+${TEXT_START_SYMBOLS}}
- *(.text)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- *(.gnu.linkonce.t*)
- } =${NOP-0}
- .init ${RELOCATING-0} : { *(.init) } =${NOP-0}
- .fini ${RELOCATING-0} : { *(.fini) } =${NOP-0}
- .rodata ${RELOCATING-0} : { *(.rodata) *(.gnu.linkonce.r*) }
- .rodata1 ${RELOCATING-0} : { *(.rodata1) }
- ${RELOCATING+_etext = .;}
- ${RELOCATING+PROVIDE (etext = .);}
- ${CREATE_SHLIB-${SDATA2}}
- ${CREATE_SHLIB-${SBSS2}}
- ${OTHER_READONLY_SECTIONS}
-
- /* Adjust the address for the data segment. We want to adjust up to
- the same address within the page on the next page up. It would
- be more correct to do this:
- ${RELOCATING+. = ${DATA_ADDR-ALIGN(${MAXPAGESIZE}) + (ALIGN(8) & (${MAXPAGESIZE} - 1))};}
- The current expression does not correctly handle the case of a
- text segment ending precisely at the end of a page; it causes the
- data segment to skip a page. The above expression does not have
- this problem, but it will currently (2/95) cause BFD to allocate
- a single segment, combining both text and data, for this case.
- This will prevent the text segment from being shared among
- multiple executions of the program; I think that is more
- important than losing a page of the virtual address space (note
- that no actual memory is lost; the page which is skipped can not
- be referenced). */
- ${RELOCATING+. = ${DATA_ADDR- ALIGN(8) + ${MAXPAGESIZE}};}
-
- .data ${RELOCATING-0} :
- {
- ${RELOCATING+${DATA_START_SYMBOLS}}
- *(.data)
- *(.gnu.linkonce.d*)
- ${CONSTRUCTING+CONSTRUCTORS}
- }
- .data1 ${RELOCATING-0} : { *(.data1) }
- ${OTHER_READWRITE_SECTIONS}
-
- .got1 ${RELOCATING-0} : { *(.got1) }
- .dynamic ${RELOCATING-0} : { *(.dynamic) }
-
- /* Put .ctors and .dtors next to the .got2 section, so that the pointers
- get relocated with -mrelocatable. Also put in the .fixup pointers.
- The current compiler no longer needs this, but keep it around for 2.7.2 */
-
- ${RELOCATING+PROVIDE (_GOT2_START_ = .);}
- .got2 ${RELOCATING-0} : { *(.got2) }
-
- ${RELOCATING+PROVIDE (__CTOR_LIST__ = .);}
- .ctors ${RELOCATING-0} : { *(.ctors) }
- ${RELOCATING+PROVIDE (__CTOR_END__ = .);}
-
- ${RELOCATING+PROVIDE (__DTOR_LIST__ = .);}
- .dtors ${RELOCATING-0} : { *(.dtors) }
- ${RELOCATING+PROVIDE (__DTOR_END__ = .);}
-
- ${RELOCATING+PROVIDE (_FIXUP_START_ = .);}
- .fixup ${RELOCATING-0} : { *(.fixup) }
- ${RELOCATING+PROVIDE (_FIXUP_END_ = .);}
- ${RELOCATING+PROVIDE (_GOT2_END_ = .);}
-
- ${RELOCATING+PROVIDE (_GOT_START_ = .);}
- .got ${RELOCATING-0} : { *(.got) }
- .got.plt ${RELOCATING-0} : { *(.got.plt) }
- ${CREATE_SHLIB+${SDATA2}}
- ${CREATE_SHLIB+${SBSS2}}
- ${RELOCATING+PROVIDE (_GOT_END_ = .);}
-
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- .sdata ${RELOCATING-0} : { *(.sdata) }
- ${RELOCATING+_edata = .;}
- ${RELOCATING+PROVIDE (edata = .);}
- .sbss ${RELOCATING-0} :
- {
- ${RELOCATING+PROVIDE (__sbss_start = .);}
- *(.sbss)
- *(.scommon)
- *(.dynsbss)
- ${RELOCATING+PROVIDE (__sbss_end = .);}
- }
- ${PLT}
- .bss ${RELOCATING-0} :
- {
- ${RELOCATING+${OTHER_BSS_SYMBOLS}}
- ${RELOCATING+PROVIDE (__bss_start = .);}
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- ${RELOCATING+_end = . ;}
- ${RELOCATING+PROVIDE (end = .);}
-
- /* These are needed for ELF backends which have not yet been
- converted to the new style linker. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
-
-EOF
-
-. $srcdir/scripttempl/DWARF.sc
-
-cat <<EOF
- ${ATTRS_SECTIONS}
- ${OTHER_SECTIONS}
-}
-EOF
#as: --compress-debug-sections=none
#ld: -r --compress-debug-sections=zlib-gnu
#readelf: -SW
-#notarget: d30v-*-* dlx-*-* fr30-*-* frv-*-* ft32-*-* i370-*-* iq2000-*-* mn10200-*-* moxie-*-* msp430-*-* mt-*-* or1k-*-* pj-*-* riscv*-*-*
+#notarget: d30v-*-* dlx-*-* fr30-*-* frv-*-* ft32-*-* iq2000-*-* mn10200-*-* moxie-*-* msp430-*-* mt-*-* or1k-*-* pj-*-* riscv*-*-*
# Not all ELF targets use the elf.em emulation...
# RISC-V has linker relaxations that delete code, so text label subtractions
# do not get resolved at assembly time, which results in a compressed section.
#ld: -r --gc-sections --entry foo
#readelf: -g --wide
#notarget: d30v-*-* dlx-*-* pj*-*-* pru-*-*
-#notarget: hppa64-*-* i370-*-* ia64-*-* mep-*-* mn10200-*-*
+#notarget: hppa64-*-* ia64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
# cr16 and crx use non-standard scripts with memory regions, which don't play
#ld: -r --gc-sections --entry bar
#readelf: -g --wide
#xfail: d30v-*-* dlx-*-* pj*-*-* pru-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
# cr16 and crx use non-standard scripts with memory regions, which don't play
#ld: -r --gc-sections --entry foo
#readelf: -g --wide
#xfail: d30v-*-* dlx-*-* pj*-*-* pru-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
# cr16 and crx use non-standard scripts with memory regions, which don't play
#ld: -r --gc-sections --entry bar
#readelf: -g --wide
#xfail: d30v-*-* dlx-*-* pj*-*-* pru-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
# cr16 and crx use non-standard scripts with memory regions, which don't play
#objdump: -s
#xfail: "bfin-*-*" "cr16-*-*" "cris*-*-*" "crx-*-*" "d10v-*-*" "d30v-*-*"
#xfail: "dlx-*-*" "fr30-*-*" "frv-*-*" "hppa*64*-*-*" "h8300-*-*" "score-*-*"
-#xfail: "i370-*-*" "ip2k-*-*" "iq2000-*-*" "lm32-*-*"
+#xfail: "ip2k-*-*" "iq2000-*-*" "lm32-*-*"
#xfail: "mcore-*-*" "mn102*-*-*" "ms1-*-*" "mep-*-*" "m68hc11-*-*" "nios2-*-*"
#xfail: "or32-*-*" "pj-*-*" "tic6x-*-*" "vax-*-*" "xstormy16-*-*"
#xfail: "xtensa*-*-*" "metag-*-*" "ft32-*-*" "pru-*-*"
#ld: --gc-sections
#readelf: -s --wide
#xfail: d30v-*-* dlx-*-* pj*-*-* pru-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#failif
#readelf: -s -D --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#failif
#readelf: -s --wide -D
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -S --wide --dyn-syms
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#readelf: -s -S --wide
#target: *-*-linux* *-*-gnu*
#xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
#...
#ld: -r --gc-sections -u foo
#readelf: -S --wide
#xfail: d30v-*-* dlx-*-* pj*-*-* pru-*-*
-#xfail: hppa64-*-* i370-*-* mep-*-* mn10200-*-*
+#xfail: hppa64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-* msp430-*-*
# msp430 puts the init_array and fini_array inside the .rodata section.
# generic linker targets don't support --gc-sections, nor do a bunch of
|| [istarget pru*-*-*]
|| [istarget alpha-*-*]
|| [istarget hppa*64-*-*]
- || [istarget i370-*-*]
|| [istarget ia64-*-*]
|| [istarget mep-*-*]
|| [istarget mn10200-*-*] } {
2018-04-16 Alan Modra <amodra@gmail.com>
+ * Makefile.am: Remove i370 support.
+ * configure.ac: Likewise.
+ * disassemble.c: Likewise.
+ * disassemble.h: Likewise.
+ * i370-dis.c: Delete.
+ * i370-opc.c: Delete.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2018-04-16 Alan Modra <amodra@gmail.com>
+
* Makefile.am: Remove h8500 support.
* configure.ac: Likewise.
* disassemble.c: Likewise.
ft32-opc.c \
h8300-dis.c \
hppa-dis.c \
- i370-dis.c \
- i370-opc.c \
i386-dis.c \
i386-opc.c \
ia64-dis.c \
ft32-opc.c \
h8300-dis.c \
hppa-dis.c \
- i370-dis.c \
- i370-opc.c \
i386-dis.c \
i386-opc.c \
ia64-dis.c \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ft32-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/h8300-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/hppa-dis.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/i370-dis.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/i370-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/i386-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/i386-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ia64-dis.Plo@am__quote@
bfd_moxie_arch) ta="$ta moxie-dis.lo moxie-opc.lo" ;;
bfd_h8300_arch) ta="$ta h8300-dis.lo" ;;
bfd_hppa_arch) ta="$ta hppa-dis.lo" ;;
- bfd_i370_arch) ta="$ta i370-dis.lo i370-opc.lo" ;;
bfd_i386_arch|bfd_iamcu_arch|bfd_l1om_arch|bfd_k1om_arch)
ta="$ta i386-dis.lo i386-opc.lo" ;;
bfd_ia64_arch) ta="$ta ia64-dis.lo ia64-opc.lo" ;;
bfd_moxie_arch) ta="$ta moxie-dis.lo moxie-opc.lo" ;;
bfd_h8300_arch) ta="$ta h8300-dis.lo" ;;
bfd_hppa_arch) ta="$ta hppa-dis.lo" ;;
- bfd_i370_arch) ta="$ta i370-dis.lo i370-opc.lo" ;;
bfd_i386_arch|bfd_iamcu_arch|bfd_l1om_arch|bfd_k1om_arch)
ta="$ta i386-dis.lo i386-opc.lo" ;;
bfd_ia64_arch) ta="$ta ia64-dis.lo ia64-opc.lo" ;;
#define ARCH_ft32
#define ARCH_h8300
#define ARCH_hppa
-#define ARCH_i370
#define ARCH_i386
#define ARCH_ia64
#define ARCH_ip2k
disassemble = print_insn_hppa;
break;
#endif
-#ifdef ARCH_i370
- case bfd_arch_i370:
- disassemble = print_insn_i370;
- break;
-#endif
#ifdef ARCH_i386
case bfd_arch_i386:
case bfd_arch_iamcu:
extern int print_insn_h8300h (bfd_vma, disassemble_info *);
extern int print_insn_h8300s (bfd_vma, disassemble_info *);
extern int print_insn_hppa (bfd_vma, disassemble_info *);
-extern int print_insn_i370 (bfd_vma, disassemble_info *);
extern int print_insn_i386 (bfd_vma, disassemble_info *);
extern int print_insn_i386_att (bfd_vma, disassemble_info *);
extern int print_insn_i386_intel (bfd_vma, disassemble_info *);
+++ /dev/null
-/* i370-dis.c -- Disassemble Instruction 370 (ESA/390) instructions
- Copyright (C) 1994-2018 Free Software Foundation, Inc.
- PowerPC version written by Ian Lance Taylor, Cygnus Support
- Rewritten for i370 ESA/390 support by Linas Vepstas <linas@linas.org>
-
- This file is part of the GNU opcodes library.
-
- This library is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- It is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
- License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this file; see the file COPYING. If not, write to the Free
- Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-#include "sysdep.h"
-#include <stdio.h>
-#include "disassemble.h"
-#include "opcode/i370.h"
-
-/* This file provides several disassembler functions, all of which use
- the disassembler interface defined in dis-asm.h. */
-
-int
-print_insn_i370 (bfd_vma memaddr, struct disassemble_info *info)
-{
- bfd_byte buffer[8];
- int status;
- i370_insn_t insn;
- const struct i370_opcode *opcode;
- const struct i370_opcode *opcode_end;
-
- status = (*info->read_memory_func) (memaddr, buffer, 6, info);
- if (status != 0)
- {
- (*info->memory_error_func) (status, memaddr, info);
- return -1;
- }
-
- /* Cast the bytes into the insn (in a host-endian indep way). */
- insn.i[0] = (buffer[0] << 24) & 0xff000000;
- insn.i[0] |= (buffer[1] << 16) & 0xff0000;
- insn.i[0] |= (buffer[2] << 8) & 0xff00;
- insn.i[0] |= buffer[3] & 0xff;
- insn.i[1] = (buffer[4] << 24) & 0xff000000;
- insn.i[1] |= (buffer[5] << 16) & 0xff0000;
-
- /* Find the first match in the opcode table. We could speed this up
- a bit by doing a binary search on the major opcode. */
- opcode_end = i370_opcodes + i370_num_opcodes;
- for (opcode = i370_opcodes; opcode < opcode_end; opcode++)
- {
- const unsigned char *opindex;
- const struct i370_operand *operand;
- i370_insn_t masked;
- int invalid;
-
- /* Mask off operands, and look for a match ... */
- masked = insn;
- if (2 == opcode->len)
- {
- masked.i[0] >>= 16;
- masked.i[0] &= 0xffff;
- }
- masked.i[0] &= opcode->mask.i[0];
- if (masked.i[0] != opcode->opcode.i[0])
- continue;
-
- if (6 == opcode->len)
- {
- masked.i[1] &= opcode->mask.i[1];
- if (masked.i[1] != opcode->opcode.i[1])
- continue;
- }
-
- /* Found a match. adjust a tad. */
- if (2 == opcode->len)
- {
- insn.i[0] >>= 16;
- insn.i[0] &= 0xffff;
- }
-
- /* Make two passes over the operands. First see if any of them
- have extraction functions, and, if they do, make sure the
- instruction is valid. */
- invalid = 0;
- for (opindex = opcode->operands; *opindex != 0; opindex++)
- {
- operand = i370_operands + *opindex;
- if (operand->extract)
- (*operand->extract) (insn, &invalid);
- }
- if (invalid)
- continue;
-
- /* The instruction is valid. */
- (*info->fprintf_func) (info->stream, "%s", opcode->name);
- if (opcode->operands[0] != 0)
- (*info->fprintf_func) (info->stream, "\t");
-
- /* Now extract and print the operands. */
- for (opindex = opcode->operands; *opindex != 0; opindex++)
- {
- long value;
-
- operand = i370_operands + *opindex;
-
- /* Extract the value from the instruction. */
- if (operand->extract)
- value = (*operand->extract) (insn, (int *) NULL);
- else
- value = (insn.i[0] >> operand->shift) & ((1 << operand->bits) - 1);
-
- /* Print the operand as directed by the flags. */
- if ((operand->flags & I370_OPERAND_OPTIONAL) != 0)
- {
- if (value)
- (*info->fprintf_func) (info->stream, "(r%ld)", value);
- }
- else if ((operand->flags & I370_OPERAND_SBASE) != 0)
- {
- (*info->fprintf_func) (info->stream, "(r%ld)", value);
- }
- else if ((operand->flags & I370_OPERAND_INDEX) != 0)
- {
- if (value)
- (*info->fprintf_func) (info->stream, "(r%ld,", value);
- else
- (*info->fprintf_func) (info->stream, "(,");
- }
- else if ((operand->flags & I370_OPERAND_LENGTH) != 0)
- {
- (*info->fprintf_func) (info->stream, "(%ld,", value);
- }
- else if ((operand->flags & I370_OPERAND_BASE) != 0)
- (*info->fprintf_func) (info->stream, "r%ld)", value);
- else if ((operand->flags & I370_OPERAND_GPR) != 0)
- (*info->fprintf_func) (info->stream, "r%ld,", value);
- else if ((operand->flags & I370_OPERAND_FPR) != 0)
- (*info->fprintf_func) (info->stream, "f%ld,", value);
- else if ((operand->flags & I370_OPERAND_RELATIVE) != 0)
- (*info->fprintf_func) (info->stream, "%ld", value);
- else
- (*info->fprintf_func) (info->stream, " %ld, ", value);
- }
-
- return opcode->len;
- }
-
- /* We could not find a match. */
- (*info->fprintf_func) (info->stream, ".short 0x%02x%02x", buffer[0], buffer[1]);
-
- return 2;
-}
+++ /dev/null
-/* i370-opc.c -- Instruction 370 (ESA/390) architecture opcode list
- Copyright (C) 1994-2018 Free Software Foundation, Inc.
- PowerPC version written by Ian Lance Taylor, Cygnus Support
- Rewritten for i370 ESA/390 support by Linas Vepstas <linas@linas.org> 1998, 1999
-
- This file is part of the GNU opcodes library.
-
- This library is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- It is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
- License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this file; see the file COPYING. If not, write to the Free
- Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
- 02110-1301, USA. */
-
-#include "sysdep.h"
-#include <stdio.h>
-#include "opcode/i370.h"
-
-/* This file holds the i370 opcode table. The opcode table
- includes almost all of the extended instruction mnemonics. This
- permits the disassembler to use them, and simplifies the assembler
- logic, at the cost of increasing the table size. The table is
- strictly constant data, so the compiler should be able to put it in
- the .text section.
-
- This file also holds the operand table. All knowledge about
- inserting operands into instructions and vice-versa is kept in this
- file. */
-\f
-/* The functions used to insert and extract complicated operands. */
-
-static i370_insn_t
-insert_ss_b2 (i370_insn_t insn, long value,
- const char **errmsg ATTRIBUTE_UNUSED)
-{
- insn.i[1] |= (value & 0xf) << 28;
- return insn;
-}
-
-static i370_insn_t
-insert_ss_d2 (i370_insn_t insn, long value,
- const char **errmsg ATTRIBUTE_UNUSED)
-{
- insn.i[1] |= (value & 0xfff) << 16;
- return insn;
-}
-
-static i370_insn_t
-insert_rxf_r3 (i370_insn_t insn, long value,
- const char **errmsg ATTRIBUTE_UNUSED)
-{
- insn.i[1] |= (value & 0xf) << 28;
- return insn;
-}
-
-static long
-extract_ss_b2 (i370_insn_t insn, int *invalid ATTRIBUTE_UNUSED)
-{
- return (insn.i[1] >>28) & 0xf;
-}
-
-static long
-extract_ss_d2 (i370_insn_t insn, int *invalid ATTRIBUTE_UNUSED)
-{
- return (insn.i[1] >>16) & 0xfff;
-}
-
-static long
-extract_rxf_r3 (i370_insn_t insn, int *invalid ATTRIBUTE_UNUSED)
-{
- return (insn.i[1] >>28) & 0xf;
-}
-\f
-/* The operands table.
- The fields are bits, shift, insert, extract, flags, name.
- The types:
- I370_OPERAND_GPR register, must name a register, must be present
- I370_OPERAND_RELATIVE displacement or legnth field, must be present
- I370_OPERAND_BASE base register; if present, must name a register
- if absent, should take value of zero
- I370_OPERAND_INDEX index register; if present, must name a register
- if absent, should take value of zero
- I370_OPERAND_OPTIONAL other optional operand (usuall reg?). */
-
-const struct i370_operand i370_operands[] =
-{
- /* The zero index is used to indicate the end of the list of
- operands. */
-#define UNUSED 0
- { 0, 0, 0, 0, 0, "unused" },
-
- /* The R1 register field in an RR form instruction. */
-#define RR_R1 (UNUSED + 1)
-#define RR_R1_MASK (0xf << 4)
- { 4, 4, 0, 0, I370_OPERAND_GPR, "RR R1" },
-
- /* The R2 register field in an RR form instruction. */
-#define RR_R2 (RR_R1 + 1)
-#define RR_R2_MASK (0xf)
- { 4, 0, 0, 0, I370_OPERAND_GPR, "RR R2" },
-
- /* The I field in an RR form SVC-style instruction. */
-#define RR_I (RR_R2 + 1)
-#define RR_I_MASK (0xff)
- { 8, 0, 0, 0, I370_OPERAND_RELATIVE, "RR I (svc)" },
-
- /* The R1 register field in an RRE form instruction. */
-#define RRE_R1 (RR_I + 1)
-#define RRE_R1_MASK (0xf << 4)
- { 4, 4, 0, 0, I370_OPERAND_GPR, "RRE R1" },
-
- /* The R2 register field in an RRE form instruction. */
-#define RRE_R2 (RRE_R1 + 1)
-#define RRE_R2_MASK (0xf)
- { 4, 0, 0, 0, I370_OPERAND_GPR, "RRE R2" },
-
- /* The R1 register field in an RRF form instruction. */
-#define RRF_R1 (RRE_R2 + 1)
-#define RRF_R1_MASK (0xf << 4)
- { 4, 4, 0, 0, I370_OPERAND_GPR, "RRF R1" },
-
- /* The R2 register field in an RRF form instruction. */
-#define RRF_R2 (RRF_R1 + 1)
-#define RRF_R2_MASK (0xf)
- { 4, 0, 0, 0, I370_OPERAND_GPR, "RRF R2" },
-
- /* The R3 register field in an RRF form instruction. */
-#define RRF_R3 (RRF_R2 + 1)
-#define RRF_R3_MASK (0xf << 12)
- { 4, 12, 0, 0, I370_OPERAND_GPR, "RRF R3" },
-
- /* The R1 register field in an RX or RS form instruction. */
-#define RX_R1 (RRF_R3 + 1)
-#define RX_R1_MASK (0xf << 20)
- { 4, 20, 0, 0, I370_OPERAND_GPR, "RX R1" },
-
- /* The X2 index field in an RX form instruction. */
-#define RX_X2 (RX_R1 + 1)
-#define RX_X2_MASK (0xf << 16)
- { 4, 16, 0, 0, I370_OPERAND_GPR | I370_OPERAND_INDEX, "RX X2"},
-
- /* The B2 base field in an RX form instruction. */
-#define RX_B2 (RX_X2 + 1)
-#define RX_B2_MASK (0xf << 12)
- { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE, "RX B2"},
-
- /* The D2 displacement field in an RX form instruction. */
-#define RX_D2 (RX_B2 + 1)
-#define RX_D2_MASK (0xfff)
- { 12, 0, 0, 0, I370_OPERAND_RELATIVE, "RX D2"},
-
- /* The R3 register field in an RXF form instruction. */
-#define RXF_R3 (RX_D2 + 1)
-#define RXF_R3_MASK (0xf << 12)
- { 4, 12, insert_rxf_r3, extract_rxf_r3, I370_OPERAND_GPR, "RXF R3" },
-
- /* The D2 displacement field in an RS form instruction. */
-#define RS_D2 (RXF_R3 + 1)
-#define RS_D2_MASK (0xfff)
- { 12, 0, 0, 0, I370_OPERAND_RELATIVE, "RS D2"},
-
- /* The R3 register field in an RS form instruction. */
-#define RS_R3 (RS_D2 + 1)
-#define RS_R3_MASK (0xf << 16)
- { 4, 16, 0, 0, I370_OPERAND_GPR, "RS R3" },
-
- /* The B2 base field in an RS form instruction. */
-#define RS_B2 (RS_R3 + 1)
-#define RS_B2_MASK (0xf << 12)
- { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "RS B2"},
-
- /* The optional B2 base field in an RS form instruction. */
- /* Note that this field will almost always be absent */
-#define RS_B2_OPT (RS_B2 + 1)
-#define RS_B2_OPT_MASK (0xf << 12)
- { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_OPTIONAL, "RS B2 OPT"},
-
- /* The R1 register field in an RSI form instruction. */
-#define RSI_R1 (RS_B2_OPT + 1)
-#define RSI_R1_MASK (0xf << 20)
- { 4, 20, 0, 0, I370_OPERAND_GPR, "RSI R1" },
-
- /* The R3 register field in an RSI form instruction. */
-#define RSI_R3 (RSI_R1 + 1)
-#define RSI_R3_MASK (0xf << 16)
- { 4, 16, 0, 0, I370_OPERAND_GPR, "RSI R3" },
-
- /* The I2 immediate field in an RSI form instruction. */
-#define RSI_I2 (RSI_R3 + 1)
-#define RSI_I2_MASK (0xffff)
- { 16, 0, 0, 0, I370_OPERAND_RELATIVE, "RSI I2" },
-
- /* The R1 register field in an RI form instruction. */
-#define RI_R1 (RSI_I2 + 1)
-#define RI_R1_MASK (0xf << 20)
- { 4, 20, 0, 0, I370_OPERAND_GPR, "RI R1" },
-
- /* The I2 immediate field in an RI form instruction. */
-#define RI_I2 (RI_R1 + 1)
-#define RI_I2_MASK (0xffff)
- { 16, 0, 0, 0, I370_OPERAND_RELATIVE, "RI I2" },
-
- /* The I2 index field in an SI form instruction. */
-#define SI_I2 (RI_I2 + 1)
-#define SI_I2_MASK (0xff << 16)
- { 8, 16, 0, 0, I370_OPERAND_RELATIVE, "SI I2"},
-
- /* The B1 base register field in an SI form instruction. */
-#define SI_B1 (SI_I2 + 1)
-#define SI_B1_MASK (0xf << 12)
- { 4, 12, 0, 0, I370_OPERAND_GPR, "SI B1" },
-
- /* The D1 displacement field in an SI form instruction. */
-#define SI_D1 (SI_B1 + 1)
-#define SI_D1_MASK (0xfff)
- { 12, 0, 0, 0, I370_OPERAND_RELATIVE, "SI D1" },
-
- /* The B2 base register field in an S form instruction. */
-#define S_B2 (SI_D1 + 1)
-#define S_B2_MASK (0xf << 12)
- { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "S B2" },
-
- /* The D2 displacement field in an S form instruction. */
-#define S_D2 (S_B2 + 1)
-#define S_D2_MASK (0xfff)
- { 12, 0, 0, 0, I370_OPERAND_RELATIVE, "S D2" },
-
- /* The L length field in an SS form instruction. */
-#define SS_L (S_D2 + 1)
-#define SS_L_MASK (0xffff<<16)
- { 8, 16, 0, 0, I370_OPERAND_RELATIVE | I370_OPERAND_LENGTH, "SS L" },
-
- /* The B1 base register field in an SS form instruction. */
-#define SS_B1 (SS_L + 1)
-#define SS_B1_MASK (0xf << 12)
- { 4, 12, 0, 0, I370_OPERAND_GPR, "SS B1" },
-
- /* The D1 displacement field in an SS form instruction. */
-#define SS_D1 (SS_B1 + 1)
-#define SS_D1_MASK (0xfff)
- { 12, 0, 0, 0, I370_OPERAND_RELATIVE, "SS D1" },
-
- /* The B2 base register field in an SS form instruction. */
-#define SS_B2 (SS_D1 + 1)
-#define SS_B2_MASK (0xf << 12)
- { 4, 12, insert_ss_b2, extract_ss_b2, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "SS B2" },
-
- /* The D2 displacement field in an SS form instruction. */
-#define SS_D2 (SS_B2 + 1)
-#define SS_D2_MASK (0xfff)
- { 12, 0, insert_ss_d2, extract_ss_d2, I370_OPERAND_RELATIVE, "SS D2" },
-
-};
-
-\f
-/* Macros used to form opcodes. */
-
-/* The short-instruction opcode. */
-#define OPS(x) ((((unsigned short) (x)) & 0xff) << 8)
-#define OPS_MASK OPS (0xff)
-
-/* the extended instruction opcode */
-#define XOPS(x) ((((unsigned short) (x)) & 0xff) << 24)
-#define XOPS_MASK XOPS (0xff)
-
-/* the S instruction opcode */
-#define SOPS(x) ((((unsigned short) (x)) & 0xffff) << 16)
-#define SOPS_MASK SOPS (0xffff)
-
-/* the E instruction opcode */
-#define EOPS(x) (((unsigned short) (x)) & 0xffff)
-#define EOPS_MASK EOPS (0xffff)
-
-/* the RI instruction opcode */
-#define ROPS(x) (((((unsigned short) (x)) & 0xff0) << 20) | \
- ((((unsigned short) (x)) & 0x00f) << 16))
-#define ROPS_MASK ROPS (0xfff)
-
-\f
-/* An E form instruction. */
-#define E(op) (EOPS (op))
-#define E_MASK E (0xffff)
-
-/* An RR form instruction. */
-#define RR(op, r1, r2) \
- (OPS (op) | ((((unsigned short) (r1)) & 0xf) << 4) | \
- ((((unsigned short) (r2)) & 0xf) ))
-
-#define RR_MASK RR (0xff, 0x0, 0x0)
-
-/* An SVC-style instruction. */
-#define SVC(op, i) \
- (OPS (op) | (((unsigned short) (i)) & 0xff))
-
-#define SVC_MASK SVC (0xff, 0x0)
-
-/* An RRE form instruction. */
-#define RRE(op, r1, r2) \
- (SOPS (op) | ((((unsigned short) (r1)) & 0xf) << 4) | \
- ((((unsigned short) (r2)) & 0xf) ))
-
-#define RRE_MASK RRE (0xffff, 0x0, 0x0)
-
-/* An RRF form instruction. */
-#define RRF(op, r3, r1, r2) \
- (SOPS (op) | ((((unsigned short) (r3)) & 0xf) << 12) | \
- ((((unsigned short) (r1)) & 0xf) << 4) | \
- ((((unsigned short) (r2)) & 0xf) ))
-
-#define RRF_MASK RRF (0xffff, 0x0, 0x0, 0x0)
-
-/* An RX form instruction. */
-#define RX(op, r1, x2, b2, d2) \
- (XOPS(op) | ((((unsigned short) (r1)) & 0xf) << 20) | \
- ((((unsigned short) (x2)) & 0xf) << 16) | \
- ((((unsigned short) (b2)) & 0xf) << 12) | \
- ((((unsigned short) (d2)) & 0xfff)))
-
-#define RX_MASK RX (0xff, 0x0, 0x0, 0x0, 0x0)
-
-/* An RXE form instruction high word. */
-#define RXEH(op, r1, x2, b2, d2) \
- (XOPS(op) | ((((unsigned short) (r1)) & 0xf) << 20) | \
- ((((unsigned short) (x2)) & 0xf) << 16) | \
- ((((unsigned short) (b2)) & 0xf) << 12) | \
- ((((unsigned short) (d2)) & 0xfff)))
-
-#define RXEH_MASK RXEH (0xff, 0, 0, 0, 0)
-
-/* An RXE form instruction low word. */
-#define RXEL(op) \
- ((((unsigned short) (op)) & 0xff) << 16 )
-
-#define RXEL_MASK RXEL (0xff)
-
-/* An RXF form instruction high word. */
-#define RXFH(op, r1, x2, b2, d2) \
- (XOPS(op) | ((((unsigned short) (r1)) & 0xf) << 20) | \
- ((((unsigned short) (x2)) & 0xf) << 16) | \
- ((((unsigned short) (b2)) & 0xf) << 12) | \
- ((((unsigned short) (d2)) & 0xfff)))
-
-#define RXFH_MASK RXFH (0xff, 0, 0, 0, 0)
-
-/* An RXF form instruction low word. */
-#define RXFL(op, r3) \
- (((((unsigned short) (r3)) & 0xf) << 28 ) | \
- ((((unsigned short) (op)) & 0xff) << 16 ))
-
-#define RXFL_MASK RXFL (0xff, 0)
-
-/* An RS form instruction. */
-#define RS(op, r1, b3, b2, d2) \
- (XOPS(op) | ((((unsigned short) (r1)) & 0xf) << 20) | \
- ((((unsigned short) (b3)) & 0xf) << 16) | \
- ((((unsigned short) (b2)) & 0xf) << 12) | \
- ((((unsigned short) (d2)) & 0xfff)))
-
-#define RS_MASK RS (0xff, 0x0, 0x0, 0x0, 0x0)
-
-/* An RSI form instruction. */
-#define RSI(op, r1, r3, i2) \
- (XOPS(op) | ((((unsigned short) (r1)) & 0xf) << 20) | \
- ((((unsigned short) (r3)) & 0xf) << 16) | \
- ((((unsigned short) (i2)) & 0xffff)))
-
-#define RSI_MASK RSI (0xff, 0x0, 0x0, 0x0)
-
-/* An RI form instruction. */
-#define RI(op, r1, i2) \
- (ROPS(op) | ((((unsigned short) (r1)) & 0xf) << 20) | \
- ((((unsigned short) (i2)) & 0xffff)))
-
-#define RI_MASK RI (0xfff, 0x0, 0x0)
-
-/* An SI form instruction. */
-#define SI(op, i2, b1, d1) \
- (XOPS(op) | ((((unsigned short) (i2)) & 0xff) << 16) | \
- ((((unsigned short) (b1)) & 0xf) << 12) | \
- ((((unsigned short) (d1)) & 0xfff)))
-
-#define SI_MASK SI (0xff, 0x0, 0x0, 0x0)
-
-/* An S form instruction. */
-#define S(op, b2, d2) \
- (SOPS(op) | ((((unsigned short)(b2)) & 0xf) << 12) | \
- ((((unsigned short)(d2)) & 0xfff)))
-
-#define S_MASK S (0xffff, 0x0, 0x0)
-
-/* An SS form instruction high word. */
-#define SSH(op, l, b1, d1) \
- (XOPS(op) | ((((unsigned short) (l)) & 0xff) << 16) | \
- ((((unsigned short) (b1)) & 0xf) << 12) | \
- ((((unsigned short) (d1)) & 0xfff)))
-
-/* An SS form instruction low word. */
-#define SSL(b2, d2) \
- ( ((((unsigned short) (b1)) & 0xf) << 28) | \
- ((((unsigned short) (d1)) & 0xfff) << 16 ))
-
-#define SS_MASK SSH (0xff, 0x0, 0x0, 0x0)
-
-/* An SSE form instruction high word. */
-#define SSEH(op, b1, d1) \
- (SOPS(op) | ((((unsigned short) (b1)) & 0xf) << 12) | \
- ((((unsigned short) (d1)) & 0xfff)))
-
-/* An SSE form instruction low word. */
-#define SSEL(b2, d2) \
- ( ((((unsigned short) (b1)) & 0xf) << 28) | \
- ((((unsigned short) (d1)) & 0xfff) << 16 ))
-
-#define SSE_MASK SSEH (0xffff, 0x0, 0x0)
-
-\f
-/* Smaller names for the flags so each entry in the opcodes table will
- fit on a single line. These flags are set up so that e.g. IXA means
- the insn is supported on the 370/XA or newer architecture.
- Note that 370 or older obsolete insn's are not supported ... */
-#define IBF I370_OPCODE_ESA390_BF
-#define IBS I370_OPCODE_ESA390_BS
-#define ICK I370_OPCODE_ESA390_CK
-#define ICM I370_OPCODE_ESA390_CM
-#define IFX I370_OPCODE_ESA390_FX
-#define IHX I370_OPCODE_ESA390_HX
-#define IIR I370_OPCODE_ESA390_IR
-#define IMI I370_OPCODE_ESA390_MI
-#define IPC I370_OPCODE_ESA390_PC
-#define IPL I370_OPCODE_ESA390_PL
-#define IQR I370_OPCODE_ESA390_QR
-#define IRP I370_OPCODE_ESA390_RP
-#define ISA I370_OPCODE_ESA390_SA
-#define ISG I370_OPCODE_ESA390_SG
-#define ISR I370_OPCODE_ESA390_SR
-#define ITR I370_OPCODE_ESA390_SR
-#define I390 IBF | IBS | ICK | ICM | IIR | IFX | IHX | IMI | IPC | IPL | IQR | IRP | ISA | ISG | ISR | ITR | I370_OPCODE_ESA390
-#define IESA I390 | I370_OPCODE_ESA370
-#define IXA IESA | I370_OPCODE_370_XA
-#define I370 IXA | I370_OPCODE_370
-#define I360 I370 | I370_OPCODE_360
-
-\f
-/* The opcode table.
-
- The format of the opcode table is:
-
- NAME LEN OPCODE_HI OPCODE_LO MASK_HI MASK_LO FLAGS { OPERANDS }
-
- NAME is the name of the instruction.
- OPCODE is the instruction opcode.
- MASK is the opcode mask; this is used to tell the disassembler
- which bits in the actual opcode must match OPCODE.
- FLAGS are flags indicated what processors support the instruction.
- OPERANDS is the list of operands.
-
- The disassembler reads the table in order and prints the first
- instruction which matches, so this table is sorted to put more
- specific instructions before more general instructions. It is also
- sorted by major opcode. */
-
-const struct i370_opcode i370_opcodes[] =
-{
-/* E form instructions */
-{ "pr", 2, {{E(0x0101), 0}}, {{E_MASK, 0}}, IESA, {0} },
-
-{ "trap2", 2, {{E(0x01FF), 0}}, {{E_MASK, 0}}, ITR, {0} },
-{ "upt", 2, {{E(0x0102), 0}}, {{E_MASK, 0}}, IXA, {0} },
-
-/* RR form instructions */
-{ "ar", 2, {{RR(0x1a,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "adr", 2, {{RR(0x2a,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "aer", 2, {{RR(0x3a,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "alr", 2, {{RR(0x1e,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "aur", 2, {{RR(0x2e,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "awr", 2, {{RR(0x3e,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "axr", 2, {{RR(0x36,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "balr", 2, {{RR(0x05,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "basr", 2, {{RR(0x0d,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
-{ "bassm", 2, {{RR(0x0c,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
-{ "bsm", 2, {{RR(0x0b,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
-{ "bcr", 2, {{RR(0x07,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "bctr", 2, {{RR(0x06,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "cdr", 2, {{RR(0x29,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "cer", 2, {{RR(0x39,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "clr", 2, {{RR(0x15,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "clcl", 2, {{RR(0x0f,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "cr", 2, {{RR(0x19,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "ddr", 2, {{RR(0x2d,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "der", 2, {{RR(0x3d,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "dr", 2, {{RR(0x1d,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "hdr", 2, {{RR(0x24,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "her", 2, {{RR(0x34,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lcdr", 2, {{RR(0x23,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lcer", 2, {{RR(0x33,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lcr", 2, {{RR(0x13,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "ldr", 2, {{RR(0x28,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "ler", 2, {{RR(0x38,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lndr", 2, {{RR(0x21,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lner", 2, {{RR(0x31,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lnr", 2, {{RR(0x11,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lpdr", 2, {{RR(0x20,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lper", 2, {{RR(0x30,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lpr", 2, {{RR(0x10,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lr", 2, {{RR(0x18,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lrdr", 2, {{RR(0x25,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lrer", 2, {{RR(0x35,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "ltdr", 2, {{RR(0x22,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "lter", 2, {{RR(0x32,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "ltr", 2, {{RR(0x12,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "mdr", 2, {{RR(0x2c,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "mer", 2, {{RR(0x3c,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "mr", 2, {{RR(0x1c,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "mvcl", 2, {{RR(0x0e,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "mxdr", 2, {{RR(0x27,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "mxr", 2, {{RR(0x26,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "nr", 2, {{RR(0x14,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "or", 2, {{RR(0x16,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "sdr", 2, {{RR(0x2b,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "ser", 2, {{RR(0x3b,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "slr", 2, {{RR(0x1f,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "spm", 2, {{RR(0x04,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1} },
-{ "sr", 2, {{RR(0x1b,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "sur", 2, {{RR(0x3f,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "swr", 2, {{RR(0x2f,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "sxr", 2, {{RR(0x37,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-{ "xr", 2, {{RR(0x17,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} },
-
-/* Unusual RR formats. */
-{ "svc", 2, {{SVC(0x0a,0), 0}}, {{SVC_MASK, 0}}, I370, {RR_I} },
-
-/* RRE form instructions. */
-{ "adbr", 4, {{RRE(0xb31a,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "aebr", 4, {{RRE(0xb30a,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "axbr", 4, {{RRE(0xb34a,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "bakr", 4, {{RRE(0xb240,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "bsa", 4, {{RRE(0xb25a,0,0), 0}}, {{RRE_MASK, 0}}, IBS, {RRE_R1, RRE_R2} },
-{ "bsg", 4, {{RRE(0xb258,0,0), 0}}, {{RRE_MASK, 0}}, ISG, {RRE_R1, RRE_R2} },
-{ "cdbr", 4, {{RRE(0xb319,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "cdfbr", 4, {{RRE(0xb395,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "cdfr", 4, {{RRE(0xb3b5,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "cebr", 4, {{RRE(0xb309,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "cefbr", 4, {{RRE(0xb394,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "cefr", 4, {{RRE(0xb3b4,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "cksm", 4, {{RRE(0xb241,0,0), 0}}, {{RRE_MASK, 0}}, ICK, {RRE_R1, RRE_R2} },
-{ "clst", 4, {{RRE(0xb25d,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
-{ "cpya", 4, {{RRE(0xb24d,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "cuse", 4, {{RRE(0xb257,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "cxbr", 4, {{RRE(0xb349,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "cxfbr", 4, {{RRE(0xb396,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "cxfr", 4, {{RRE(0xb3b6,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "cxr", 4, {{RRE(0xb369,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "ddbr", 4, {{RRE(0xb31d,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "debr", 4, {{RRE(0xb30d,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "dxbr", 4, {{RRE(0xb34d,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "dxr", 4, {{RRE(0xb22d,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "ear", 4, {{RRE(0xb24f,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "efpc", 4, {{RRE(0xb38c,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "epar", 4, {{RRE(0xb226,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
-{ "ereg", 4, {{RRE(0xb249,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "esar", 4, {{RRE(0xb227,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
-{ "esta", 4, {{RRE(0xb24a,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "fidr", 4, {{RRE(0xb37f,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "fier", 4, {{RRE(0xb377,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "fixr", 4, {{RRE(0xb367,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "iac", 4, {{RRE(0xb224,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
-{ "ipm", 4, {{RRE(0xb222,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
-{ "ipte", 4, {{RRE(0xb221,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "iske", 4, {{RRE(0xb229,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "ivsk", 4, {{RRE(0xb223,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "kdbr", 4, {{RRE(0xb318,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "kebr", 4, {{RRE(0xb308,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "kxbr", 4, {{RRE(0xb348,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lcdbr", 4, {{RRE(0xb313,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lcebr", 4, {{RRE(0xb303,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lcxbr", 4, {{RRE(0xb343,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lcxr", 4, {{RRE(0xb363,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "lder", 4, {{RRE(0xb324,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "ldxbr", 4, {{RRE(0xb345,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "ledbr", 4, {{RRE(0xb344,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lexbr", 4, {{RRE(0xb346,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lexr", 4, {{RRE(0xb366,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "lndbr", 4, {{RRE(0xb311,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lnebr", 4, {{RRE(0xb301,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lnxbr", 4, {{RRE(0xb341,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lnxr", 4, {{RRE(0xb361,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "lpdbr", 4, {{RRE(0xb310,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lpebr", 4, {{RRE(0xb300,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lpxbr", 4, {{RRE(0xb340,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "lpxr", 4, {{RRE(0xb360,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "ltdbr", 4, {{RRE(0xb312,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "ltebr", 4, {{RRE(0xb302,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "ltxbr", 4, {{RRE(0xb342,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "ltxr", 4, {{RRE(0xb362,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "lura", 4, {{RRE(0xb24b,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "lxdr", 4, {{RRE(0xb325,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "lxer", 4, {{RRE(0xb326,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "lxr", 4, {{RRE(0xb365,0,0), 0}}, {{RRE_MASK, 0}}, IFX, {RRE_R1, RRE_R2} },
-{ "lzdr", 4, {{RRE(0xb375,0,0), 0}}, {{RRE_MASK, 0}}, IFX, {RRE_R1, RRE_R2} },
-{ "lzer", 4, {{RRE(0xb374,0,0), 0}}, {{RRE_MASK, 0}}, IFX, {RRE_R1, RRE_R2} },
-{ "lzxr", 4, {{RRE(0xb376,0,0), 0}}, {{RRE_MASK, 0}}, IFX, {RRE_R1, RRE_R2} },
-{ "mdbr", 4, {{RRE(0xb31c,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "mdebr", 4, {{RRE(0xb30c,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "meebr", 4, {{RRE(0xb317,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "meer", 4, {{RRE(0xb337,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "msr", 4, {{RRE(0xb252,0,0), 0}}, {{RRE_MASK, 0}}, IIR, {RRE_R1, RRE_R2} },
-{ "msta", 4, {{RRE(0xb247,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1} },
-{ "mvpg", 4, {{RRE(0xb254,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "mvst", 4, {{RRE(0xb255,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
-{ "mxbr", 4, {{RRE(0xb34c,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "mxdbr", 4, {{RRE(0xb307,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "palb", 4, {{RRE(0xb248,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {0} },
-{ "prbe", 4, {{RRE(0xb22a,0,0), 0}}, {{RRE_MASK, 0}}, I370, {RRE_R1, RRE_R2} },
-{ "pt", 4, {{RRE(0xb228,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "rrbe", 4, {{RRE(0xb22a,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "sar", 4, {{RRE(0xb24e,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "sdbr", 4, {{RRE(0xb31b,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "sebr", 4, {{RRE(0xb30b,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "servc", 4, {{RRE(0xb220,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "sfpc", 4, {{RRE(0xb384,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "sqdbr", 4, {{RRE(0xb315,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "sqdr", 4, {{RRE(0xb244,0,0), 0}}, {{RRE_MASK, 0}}, IQR, {RRE_R1, RRE_R2} },
-{ "sqebr", 4, {{RRE(0xb314,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "sqer", 4, {{RRE(0xb245,0,0), 0}}, {{RRE_MASK, 0}}, IQR, {RRE_R1, RRE_R2} },
-{ "sqxbr", 4, {{RRE(0xb316,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "sqxr", 4, {{RRE(0xb336,0,0), 0}}, {{RRE_MASK, 0}}, IHX, {RRE_R1, RRE_R2} },
-{ "srst", 4, {{RRE(0xb25e,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
-{ "ssar", 4, {{RRE(0xb225,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
-{ "sske", 4, {{RRE(0xb22b,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "stura", 4, {{RRE(0xb246,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "sxbr", 4, {{RRE(0xb34b,0,0), 0}}, {{RRE_MASK, 0}}, IBF, {RRE_R1, RRE_R2} },
-{ "tar", 4, {{RRE(0xb24c,0,0), 0}}, {{RRE_MASK, 0}}, IESA, {RRE_R1, RRE_R2} },
-{ "tb", 4, {{RRE(0xb22c,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
-{ "thdr", 4, {{RRE(0xb359,0,0), 0}}, {{RRE_MASK, 0}}, IFX, {RRE_R1, RRE_R2} },
-{ "thder", 4, {{RRE(0xb359,0,0), 0}}, {{RRE_MASK, 0}}, IFX, {RRE_R1, RRE_R2} },
-
-/* RRF form instructions. */
-{ "cfdbr", 4, {{RRF(0xb399,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "cfdr", 4, {{RRF(0xb3b9,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} },
-{ "cfebr", 4, {{RRF(0xb398,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "cfer", 4, {{RRF(0xb3b8,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} },
-{ "cfxbr", 4, {{RRF(0xb39a,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "cfxr", 4, {{RRF(0xb3ba,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} },
-{ "didbr", 4, {{RRF(0xb35b,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "diebr", 4, {{RRF(0xb353,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "fidbr", 4, {{RRF(0xb35f,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "fiebr", 4, {{RRF(0xb357,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "fixbr", 4, {{RRF(0xb347,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "madbr", 4, {{RRF(0xb31e,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "maebr", 4, {{RRF(0xb30e,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "msdbr", 4, {{RRF(0xb31f,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "msebr", 4, {{RRF(0xb30f,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} },
-{ "tbdr", 4, {{RRF(0xb351,0,0,0), 0}}, {{RRF_MASK, 0}}, IFX, {RRF_R1, RRF_R3, RRF_R2} },
-{ "tbedr", 4, {{RRF(0xb350,0,0,0), 0}}, {{RRF_MASK, 0}}, IFX, {RRF_R1, RRF_R3, RRF_R2} },
-
-/* RX form instructions. */
-{ "a", 4, {{RX(0x5a,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ad", 4, {{RX(0x6a,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ae", 4, {{RX(0x7a,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ah", 4, {{RX(0x4a,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "al", 4, {{RX(0x5e,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "au", 4, {{RX(0x7e,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "aw", 4, {{RX(0x6e,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "bal", 4, {{RX(0x45,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "bas", 4, {{RX(0x4d,0,0,0,0), 0}}, {{RX_MASK, 0}}, IXA, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "bc", 4, {{RX(0x47,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "bct", 4, {{RX(0x46,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "c", 4, {{RX(0x59,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "cd", 4, {{RX(0x69,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ce", 4, {{RX(0x79,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ch", 4, {{RX(0x49,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "cl", 4, {{RX(0x55,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "cvb", 4, {{RX(0x4f,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "cvd", 4, {{RX(0x4e,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "d", 4, {{RX(0x5d,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "dd", 4, {{RX(0x6d,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "de", 4, {{RX(0x7d,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ex", 4, {{RX(0x44,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ic", 4, {{RX(0x43,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "l", 4, {{RX(0x58,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "la", 4, {{RX(0x41,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lae", 4, {{RX(0x51,0,0,0,0), 0}}, {{RX_MASK, 0}}, IESA, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ld", 4, {{RX(0x68,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "le", 4, {{RX(0x78,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lh", 4, {{RX(0x48,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lra", 4, {{RX(0xb1,0,0,0,0), 0}}, {{RX_MASK, 0}}, IXA, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "m", 4, {{RX(0x5c,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "md", 4, {{RX(0x6c,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "me", 4, {{RX(0x7c,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "mh", 4, {{RX(0x4c,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ms", 4, {{RX(0x71,0,0,0,0), 0}}, {{RX_MASK, 0}}, IIR, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "mxd", 4, {{RX(0x67,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "n", 4, {{RX(0x54,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "o", 4, {{RX(0x56,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "s", 4, {{RX(0x5b,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sd", 4, {{RX(0x6b,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "se", 4, {{RX(0x7b,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sh", 4, {{RX(0x4b,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sl", 4, {{RX(0x5f,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "st", 4, {{RX(0x50,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "stc", 4, {{RX(0x42,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "std", 4, {{RX(0x60,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ste", 4, {{RX(0x70,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sth", 4, {{RX(0x40,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "su", 4, {{RX(0x7f,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sw", 4, {{RX(0x6f,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "x", 4, {{RX(0x57,0,0,0,0), 0}}, {{RX_MASK, 0}}, I370, {RX_R1, RX_D2, RX_X2, RX_B2} },
-
-/* RXE form instructions. */
-{ "adb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x1a)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "aeb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x0a)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "cdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x19)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ceb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x09)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ddb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x1d)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "deb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x0d)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "kdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x18)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "keb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x08)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lde", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x24)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "ldeb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x04)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lxd", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x25)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lxdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x05)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lxe", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x26)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "lxeb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x06)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "mdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x1c)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "mdeb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x0c)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "mee", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x37)}}, {{RXEH_MASK, RXEL_MASK}}, IHX, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "meeb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x17)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "mxdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x07)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sqd", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x35)}}, {{RXEH_MASK, RXEL_MASK}}, IHX, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sqdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x15)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sqe", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x34)}}, {{RXEH_MASK, RXEL_MASK}}, IHX, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sqeb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x14)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "sdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x1b)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "seb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x0b)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "tcdb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x11)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "tceb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x10)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-{ "tcxb", 6, {{RXEH(0xed,0,0,0,0), RXEL(0x12)}}, {{RXEH_MASK, RXEL_MASK}}, IBF, {RX_R1, RX_D2, RX_X2, RX_B2} },
-
-/* RXF form instructions. */
-{ "madb", 6, {{RXFH(0xed,0,0,0,0), RXFL(0x1e,0)}}, {{RXFH_MASK, RXFL_MASK}}, IBF, {RX_R1, RXF_R3, RX_D2, RX_X2, RX_B2} },
-{ "maeb", 6, {{RXFH(0xed,0,0,0,0), RXFL(0x0e,0)}}, {{RXFH_MASK, RXFL_MASK}}, IBF, {RX_R1, RXF_R3, RX_D2, RX_X2, RX_B2} },
-{ "msdb", 6, {{RXFH(0xed,0,0,0,0), RXFL(0x1f,0)}}, {{RXFH_MASK, RXFL_MASK}}, IBF, {RX_R1, RXF_R3, RX_D2, RX_X2, RX_B2} },
-{ "mseb", 6, {{RXFH(0xed,0,0,0,0), RXFL(0x0f,0)}}, {{RXFH_MASK, RXFL_MASK}}, IBF, {RX_R1, RXF_R3, RX_D2, RX_X2, RX_B2} },
-
-/* RS form instructions. */
-{ "bxh", 4, {{RS(0x86,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "bxle", 4, {{RS(0x87,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "cds", 4, {{RS(0xbb,0,0,0,0), 0}}, {{RS_MASK, 0}}, IXA, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "clcle", 4, {{RS(0xa9,0,0,0,0), 0}}, {{RS_MASK, 0}}, ICM, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "clm", 4, {{RS(0xbd,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "cs", 4, {{RS(0xba,0,0,0,0), 0}}, {{RS_MASK, 0}}, IXA, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "icm", 4, {{RS(0xbf,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "lam", 4, {{RS(0x9a,0,0,0,0), 0}}, {{RS_MASK, 0}}, IESA, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "lctl", 4, {{RS(0xb7,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "lm", 4, {{RS(0x98,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "mvcle", 4, {{RS(0xa8,0,0,0,0), 0}}, {{RS_MASK, 0}}, ICM, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "sigp", 4, {{RS(0xae,0,0,0,0), 0}}, {{RS_MASK, 0}}, IXA, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "stam", 4, {{RS(0x9b,0,0,0,0), 0}}, {{RS_MASK, 0}}, IESA, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "stcm", 4, {{RS(0xbe,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "stctl", 4, {{RS(0xb6,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "stm", 4, {{RS(0x90,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
-{ "trace", 4, {{RS(0x99,0,0,0,0), 0}}, {{RS_MASK, 0}}, IXA, {RX_R1, RS_R3, RS_D2, RS_B2} },
-
-/* RS form instructions with blank R3 and optional B2 (shift left/right). */
-{ "sla", 4, {{RS(0x8b,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-{ "slda", 4, {{RS(0x8f,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-{ "sldl", 4, {{RS(0x8d,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-{ "sll", 4, {{RS(0x89,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-{ "sra", 4, {{RS(0x8a,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-{ "srda", 4, {{RS(0x8e,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-{ "srdl", 4, {{RS(0x8c,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-{ "srl", 4, {{RS(0x88,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_D2, RS_B2_OPT} },
-
-/* RSI form instructions. */
-{ "brxh", 4, {{RSI(0x84,0,0,0), 0}}, {{RSI_MASK, 0}}, IIR, {RSI_R1, RSI_R3, RSI_I2} },
-{ "brxle", 4, {{RSI(0x85,0,0,0), 0}}, {{RSI_MASK, 0}}, IIR, {RSI_R1, RSI_R3, RSI_I2} },
-
-/* RI form instructions. */
-{ "ahi", 4, {{RI(0xa7a,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "bras", 4, {{RI(0xa75,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "brc", 4, {{RI(0xa74,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "brct", 4, {{RI(0xa76,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "chi", 4, {{RI(0xa7e,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "lhi", 4, {{RI(0xa78,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "mhi", 4, {{RI(0xa7c,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "tmh", 4, {{RI(0xa70,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-{ "tml", 4, {{RI(0xa71,0,0), 0}}, {{RI_MASK, 0}}, IIR, {RI_R1, RI_I2} },
-
-/* SI form instructions. */
-{ "cli", 4, {{SI(0x95,0,0,0), 0}}, {{SI_MASK, 0}}, I370, {SI_D1, SI_B1, SI_I2} },
-{ "mc", 4, {{SI(0xaf,0,0,0), 0}}, {{SI_MASK, 0}}, I370, {SI_D1, SI_B1, SI_I2} },
-{ "mvi", 4, {{SI(0x92,0,0,0), 0}}, {{SI_MASK, 0}}, I370, {SI_D1, SI_B1, SI_I2} },
-{ "ni", 4, {{SI(0x94,0,0,0), 0}}, {{SI_MASK, 0}}, I370, {SI_D1, SI_B1, SI_I2} },
-{ "oi", 4, {{SI(0x96,0,0,0), 0}}, {{SI_MASK, 0}}, I370, {SI_D1, SI_B1, SI_I2} },
-{ "stnsm", 4, {{SI(0xac,0,0,0), 0}}, {{SI_MASK, 0}}, IXA, {SI_D1, SI_B1, SI_I2} },
-{ "stosm", 4, {{SI(0xad,0,0,0), 0}}, {{SI_MASK, 0}}, IXA, {SI_D1, SI_B1, SI_I2} },
-{ "tm", 4, {{SI(0x91,0,0,0), 0}}, {{SI_MASK, 0}}, I370, {SI_D1, SI_B1, SI_I2} },
-{ "xi", 4, {{SI(0x97,0,0,0), 0}}, {{SI_MASK, 0}}, I370, {SI_D1, SI_B1, SI_I2} },
-
-/* S form instructions. */
-{ "cfc", 4, {{S(0xb21a,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "csch", 4, {{S(0xb230,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "hsch", 4, {{S(0xb231,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "ipk", 4, {{S(0xb20b,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "lfpc", 4, {{S(0xb29d,0,0), 0}}, {{S_MASK, 0}}, IBF, {S_D2, S_B2} },
-{ "lpsw", 4, {{S(0x8200,0,0), 0}}, {{S_MASK, 0}}, I370, {S_D2, S_B2} },
-{ "msch", 4, {{S(0xb232,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "pc", 4, {{S(0xb218,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "pcf", 4, {{S(0xb218,0,0), 0}}, {{S_MASK, 0}}, IPC, {S_D2, S_B2} },
-{ "ptlb", 4, {{S(0xb20d,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "rchp", 4, {{S(0xb23b,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "rp", 4, {{S(0xb277,0,0), 0}}, {{S_MASK, 0}}, IRP, {0} },
-{ "rsch", 4, {{S(0xb238,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "sac", 4, {{S(0xb219,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "sacf", 4, {{S(0xb279,0,0), 0}}, {{S_MASK, 0}}, ISA, {S_D2, S_B2} },
-{ "sal", 4, {{S(0xb237,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "schm", 4, {{S(0xb23c,0,0), 0}}, {{S_MASK, 0}}, IXA, {0} },
-{ "sck", 4, {{S(0xb204,0,0), 0}}, {{S_MASK, 0}}, I370, {S_D2, S_B2} },
-{ "sckc", 4, {{S(0xb206,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "spka", 4, {{S(0xb20a,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "spt", 4, {{S(0xb208,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "spx", 4, {{S(0xb210,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "srnm", 4, {{S(0xb299,0,0), 0}}, {{S_MASK, 0}}, IBF, {S_D2, S_B2} },
-{ "ssch", 4, {{S(0xb233,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "ssm", 4, {{S(0x8000,0,0), 0}}, {{S_MASK, 0}}, I370, {S_D2, S_B2} },
-{ "stap", 4, {{S(0xb212,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "stck", 4, {{S(0xb205,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "stckc", 4, {{S(0xb207,0,0), 0}}, {{S_MASK, 0}}, I370, {S_D2, S_B2} },
-{ "stcps", 4, {{S(0xb23a,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "stcrw", 4, {{S(0xb239,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "stfpc", 4, {{S(0xb29c,0,0), 0}}, {{S_MASK, 0}}, IBF, {S_D2, S_B2} },
-{ "stidp", 4, {{S(0xb202,0,0), 0}}, {{S_MASK, 0}}, I370, {S_D2, S_B2} },
-{ "stpt", 4, {{S(0xb209,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "stpx", 4, {{S(0xb211,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "stsch", 4, {{S(0xb234,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "tpi", 4, {{S(0xb236,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-{ "trap4", 4, {{S(0xb2ff,0,0), 0}}, {{S_MASK, 0}}, ITR, {S_D2, S_B2} },
-{ "ts", 4, {{S(0x9300,0,0), 0}}, {{S_MASK, 0}}, I370, {S_D2, S_B2} },
-{ "tsch", 4, {{S(0xb235,0,0), 0}}, {{S_MASK, 0}}, IXA, {S_D2, S_B2} },
-
-/* SS form instructions. */
-{ "ap", 6, {{SSH(0xfa,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "clc", 6, {{SSH(0xd5,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "cp", 6, {{SSH(0xf9,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "dp", 6, {{SSH(0xfd,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "ed", 6, {{SSH(0xde,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "edmk", 6, {{SSH(0xdf,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvc", 6, {{SSH(0xd2,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvcin", 6, {{SSH(0xe8,0,0,0), 0}}, {{SS_MASK, 0}}, IMI, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvck", 6, {{SSH(0xd9,0,0,0), 0}}, {{SS_MASK, 0}}, IXA, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvcp", 6, {{SSH(0xda,0,0,0), 0}}, {{SS_MASK, 0}}, IXA, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvcs", 6, {{SSH(0xdb,0,0,0), 0}}, {{SS_MASK, 0}}, IXA, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvn", 6, {{SSH(0xd1,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvo", 6, {{SSH(0xf1,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "mvz", 6, {{SSH(0xd3,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "nc", 6, {{SSH(0xd4,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "oc", 6, {{SSH(0xd6,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "pack", 6, {{SSH(0xf2,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "plo", 6, {{SSH(0xee,0,0,0), 0}}, {{SS_MASK, 0}}, IPL, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "sp", 6, {{SSH(0xfb,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "srp", 6, {{SSH(0xf0,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "tr", 6, {{SSH(0xdc,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "trt", 6, {{SSH(0xdd,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "unpk", 6, {{SSH(0xf3,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "xc", 6, {{SSH(0xd7,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-{ "zap", 6, {{SSH(0xf8,0,0,0), 0}}, {{SS_MASK, 0}}, I370, {SS_D1,SS_L,SS_B1,SS_D2,SS_B2} },
-
-/* SSE form instructions. */
-{ "lasp", 6, {{SSEH(0xe500,0,0), 0}}, {{SSE_MASK, 0}}, IXA, {SS_D1, SS_B1, SS_D2, SS_B2} },
-{ "mvcdk", 6, {{SSEH(0xe50f,0,0), 0}}, {{SSE_MASK, 0}}, IESA, {SS_D1, SS_B1, SS_D2, SS_B2} },
-{ "mvcsk", 6, {{SSEH(0xe50e,0,0), 0}}, {{SSE_MASK, 0}}, IESA, {SS_D1, SS_B1, SS_D2, SS_B2} },
-{ "tprot", 6, {{SSEH(0xe501,0,0), 0}}, {{SSE_MASK, 0}}, IXA, {SS_D1, SS_B1, SS_D2, SS_B2} },
-
-/* */
-};
-
-const int i370_num_opcodes =
- sizeof (i370_opcodes) / sizeof (i370_opcodes[0]);
-\f
-/* The macro table. This is only used by the assembler. */
-
-const struct i370_macro i370_macros[] =
-{
-{ "b", 1, I370, "bc 15,%0" },
-{ "br", 1, I370, "bcr 15,%0" },
-
-{ "nop", 1, I370, "bc 0,%0" },
-{ "nopr", 1, I370, "bcr 0,%0" },
-
-{ "bh", 1, I370, "bc 2,%0" },
-{ "bhr", 1, I370, "bcr 2,%0" },
-{ "bl", 1, I370, "bc 4,%0" },
-{ "blr", 1, I370, "bcr 4,%0" },
-{ "be", 1, I370, "bc 8,%0" },
-{ "ber", 1, I370, "bcr 8,%0" },
-
-{ "bnh", 1, I370, "bc 13,%0" },
-{ "bnhr", 1, I370, "bcr 13,%0" },
-{ "bnl", 1, I370, "bc 11,%0" },
-{ "bnlr", 1, I370, "bcr 11,%0" },
-{ "bne", 1, I370, "bc 7,%0" },
-{ "bner", 1, I370, "bcr 7,%0" },
-
-{ "bp", 1, I370, "bc 2,%0" },
-{ "bpr", 1, I370, "bcr 2,%0" },
-{ "bm", 1, I370, "bc 4,%0" },
-{ "bmr", 1, I370, "bcr 4,%0" },
-{ "bz", 1, I370, "bc 8,%0" },
-{ "bzr", 1, I370, "bcr 8,%0" },
-{ "bo", 1, I370, "bc 1,%0" },
-{ "bor", 1, I370, "bcr 1,%0" },
-
-{ "bnp", 1, I370, "bc 13,%0" },
-{ "bnpr", 1, I370, "bcr 13,%0" },
-{ "bnm", 1, I370, "bc 11,%0" },
-{ "bnmr", 1, I370, "bcr 11,%0" },
-{ "bnz", 1, I370, "bc 7,%0" },
-{ "bnzr", 1, I370, "bcr 7,%0" },
-{ "bno", 1, I370, "bc 14,%0" },
-{ "bnor", 1, I370, "bcr 14,%0" },
-
-{ "sync", 0, I370, "bcr 15,0" },
-
-};
-
-const int i370_num_macros =
- sizeof (i370_macros) / sizeof (i370_macros[0]);
ft32-opc.c
h8300-dis.c
hppa-dis.c
-i370-dis.c
-i370-opc.c
i386-dis.c
i386-gen.c
i386-init.h
projects / external / binutils.git / commitdiff