Move the ValueTracking implementation to KnownBits, the SelectionDAG version is more limited so I'm intending to replace that as a separate commit.
/// Compute known bits for urem(LHS, RHS).
static KnownBits urem(const KnownBits &LHS, const KnownBits &RHS);
+ /// Compute known bits for srem(LHS, RHS).
+ static KnownBits srem(const KnownBits &LHS, const KnownBits &RHS);
+
/// Compute known bits for umax(LHS, RHS).
static KnownBits umax(const KnownBits &LHS, const KnownBits &RHS);
break;
}
case Instruction::SRem:
- if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
- APInt RA = Rem->getValue().abs();
- if (RA.isPowerOf2()) {
- APInt LowBits = RA - 1;
- computeKnownBits(I->getOperand(0), Known2, Depth + 1, Q);
-
- // The low bits of the first operand are unchanged by the srem.
- Known.Zero = Known2.Zero & LowBits;
- Known.One = Known2.One & LowBits;
-
- // If the first operand is non-negative or has all low bits zero, then
- // the upper bits are all zero.
- if (Known2.isNonNegative() || LowBits.isSubsetOf(Known2.Zero))
- Known.Zero |= ~LowBits;
-
- // If the first operand is negative and not all low bits are zero, then
- // the upper bits are all one.
- if (Known2.isNegative() && LowBits.intersects(Known2.One))
- Known.One |= ~LowBits;
-
- assert((Known.Zero & Known.One) == 0 && "Bits known to be one AND zero?");
- break;
- }
- }
-
- // The sign bit is the LHS's sign bit, except when the result of the
- // remainder is zero.
- computeKnownBits(I->getOperand(0), Known2, Depth + 1, Q);
- // If it's known zero, our sign bit is also zero.
- if (Known2.isNonNegative())
- Known.makeNonNegative();
-
+ computeKnownBits(I->getOperand(0), Known, Depth + 1, Q);
+ computeKnownBits(I->getOperand(1), Known2, Depth + 1, Q);
+ Known = KnownBits::srem(Known, Known2);
break;
+
case Instruction::URem:
computeKnownBits(I->getOperand(0), Known, Depth + 1, Q);
computeKnownBits(I->getOperand(1), Known2, Depth + 1, Q);
return Known;
}
+KnownBits KnownBits::srem(const KnownBits &LHS, const KnownBits &RHS) {
+ unsigned BitWidth = LHS.getBitWidth();
+ assert(!LHS.hasConflict() && !RHS.hasConflict());
+ KnownBits Known(BitWidth);
+
+ if (RHS.isConstant() && RHS.getConstant().isPowerOf2()) {
+ // The low bits of the first operand are unchanged by the srem.
+ APInt LowBits = RHS.getConstant() - 1;
+ Known.Zero = LHS.Zero & LowBits;
+ Known.One = LHS.One & LowBits;
+
+ // If the first operand is non-negative or has all low bits zero, then
+ // the upper bits are all zero.
+ if (LHS.isNonNegative() || LowBits.isSubsetOf(LHS.Zero))
+ Known.Zero |= ~LowBits;
+
+ // If the first operand is negative and not all low bits are zero, then
+ // the upper bits are all one.
+ if (LHS.isNegative() && LowBits.intersects(LHS.One))
+ Known.One |= ~LowBits;
+ return Known;
+ }
+
+ // The sign bit is the LHS's sign bit, except when the result of the
+ // remainder is zero. If it's known zero, our sign bit is also zero.
+ if (LHS.isNonNegative())
+ Known.makeNonNegative();
+ return Known;
+}
+
KnownBits &KnownBits::operator&=(const KnownBits &RHS) {
// Result bit is 0 if either operand bit is 0.
Zero |= RHS.Zero;
KnownBits KnownMul(KnownAnd);
KnownBits KnownUDiv(KnownAnd);
KnownBits KnownURem(KnownAnd);
+ KnownBits KnownSRem(KnownAnd);
KnownBits KnownShl(KnownAnd);
KnownBits KnownLShr(KnownAnd);
KnownBits KnownAShr(KnownAnd);
Res = N1.urem(N2);
KnownURem.One &= Res;
KnownURem.Zero &= ~Res;
+
+ Res = N1.srem(N2);
+ KnownSRem.One &= Res;
+ KnownSRem.Zero &= ~Res;
}
if (N2.ult(1ULL << N1.getBitWidth())) {
EXPECT_TRUE(ComputedURem.Zero.isSubsetOf(KnownURem.Zero));
EXPECT_TRUE(ComputedURem.One.isSubsetOf(KnownURem.One));
+ KnownBits ComputedSRem = KnownBits::srem(Known1, Known2);
+ EXPECT_TRUE(ComputedSRem.Zero.isSubsetOf(KnownSRem.Zero));
+ EXPECT_TRUE(ComputedSRem.One.isSubsetOf(KnownSRem.One));
+
KnownBits ComputedShl = KnownBits::shl(Known1, Known2);
EXPECT_TRUE(ComputedShl.Zero.isSubsetOf(KnownShl.Zero));
EXPECT_TRUE(ComputedShl.One.isSubsetOf(KnownShl.One));